From: Michal Simek <michal.simek@xilinx.com>
Date: Mon, 24 Jun 2019 12:17:45 +0000 (+0200)
Subject: arm64: versal: Add description for a2197-p x-prc-03
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=941476300b314a8448028f4dbec1d5e2e7629445;p=thirdparty%2Fu-boot.git

arm64: versal: Add description for a2197-p x-prc-03

Add description based on specification and schematics.
All FIXMEs should be fixed when HW is ready.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f0219fc40f5..8cecd1bad07 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -215,6 +215,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
 	versal-vc-p-a2197-00-revA-x-prc-01-revA.dtb \
 	versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi.dtb \
 	versal-vc-p-a2197-00-revA-x-prc-02-revA.dtb \
+	versal-vc-p-a2197-00-revA-x-prc-03-revA.dtb \
 	versal-vc-d-d1760-01-revA.dtb
 dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
 	zynqmp-r5.dtb
diff --git a/arch/arm/dts/versal-vc-p-a2197-00-revA-x-prc-03-revA.dts b/arch/arm/dts/versal-vc-p-a2197-00-revA-x-prc-03-revA.dts
new file mode 100644
index 00000000000..ed1004a7161
--- /dev/null
+++ b/arch/arm/dts/versal-vc-p-a2197-00-revA-x-prc-03-revA.dts
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal X-PRC-03 revA (SE3)
+ *
+ * (C) Copyright 2019, Xilinx, Inc.
+ *
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include "versal-vc-p-a2197-00-revA.dts"
+
+/ {
+	chosen {
+		bootargs = "console=ttyAMA0 earlycon=pl011,mmio32,0xFF000000,115200n8 clk_ignore_unused";
+		stdout-path = "serial0:115200";
+	};
+
+	aliases {
+		can0 = &can0;
+		can1 = &can1;
+		i2c0 = &i2c1;
+		mmc0 = &sdhci0;
+		mmc1 = &sdhci1;
+		serial0 = &serial0;
+		spi0 = &qspi;
+		spi1 = &spi0;
+	};
+};
+
+/* SMAP via cc108 */
+
+&can0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <400000>;
+	/* Must be enabled via J90/J91 */
+	eeprom_versal: eeprom@51 { /* U2 - 128kb RM24C128DS */
+		compatible = "atmel,24c128";
+		reg = <0x51>;
+	};
+};
+
+&qspi {
+	status = "okay"; /* u7 */
+	num-cs = <0x1>;
+	is-dual = <0x1>;
+	spi-rx-bus-width = <4>;
+	spi-tx-bus-width = <1>;
+
+	flash@0 {
+		compatible = "m25p80", "spi-flash";
+		reg = <0x0>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <4>;
+		spi-max-frequency = <108000000>;
+	};
+};
+
+&serial0 {
+	status = "okay";
+};
+
+&sdhci0 { /* J99 MIO28 - MIO33 */
+	status = "okay";
+	xlnx,mio_bank = <1>; /* FIXME */
+	no-1-8-v;
+};
+
+&sdhci1 { /* EMMC IS21ES08G 200MHz MIO40 - MIO49 */
+	status = "okay";
+	non-removable;
+	disable-wp;
+	bus-width = <8>;
+	xlnx,mio_bank = <0>; /* FIXME */
+};
+
+&spi0 {
+	status = "okay";
+	num-cs = <1>;
+
+	flash@0 { /* U6 - IS25LQ032B - 16Mb */
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "issi,is25lq032b", "m25p80", "spi-flash";
+		spi-max-frequency = <104000000>;
+		reg = <0>;
+
+		partition@0 {
+			label = "spi0-flash0";
+			reg = <0 0x200000>;
+		};
+	};
+};
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index 07ebb351f33..ad93c8e972d 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -46,7 +46,7 @@ CONFIG_EFI_PARTITION=y
 # CONFIG_PARTITION_UUIDS is not set
 CONFIG_OF_BOARD=y
 CONFIG_DEFAULT_DEVICE_TREE="versal-vc-p-a2197-00-revA-x-prc-01-revA"
-CONFIG_OF_LIST="versal-vc-p-a2197-00-revA-x-prc-01-revA versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi versal-vc-p-a2197-00-revA-x-prc-02-revA versal-vc-d-d1760-01-revA"
+CONFIG_OF_LIST="versal-vc-p-a2197-00-revA-x-prc-01-revA versal-vc-p-a2197-00-revA-x-prc-01-revA-ospi versal-vc-p-a2197-00-revA-x-prc-02-revA versal-vc-p-a2197-00-revA-x-prc-03-revA versal-vc-d-d1760-01-revA "
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SPL_DM_SEQ_ALIAS=y