From: Richard Biener <rguenther@suse.de>
Date: Fri, 5 Dec 2025 08:04:02 +0000 (+0100)
Subject: Make gcc.dg/vect/vect-simd-clone-24.c more robust
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=941df4bc7ac83574374a3623ac11b8685c2282cb;p=thirdparty%2Fgcc.git

Make gcc.dg/vect/vect-simd-clone-24.c more robust

When -march=cascadelake is added we get 256bit vectorization by
default but there's no OMP SIMD ABI for this case with inbranch.
So add -mprefer-vector-width=512 to the testcase.

	PR tree-optimization/122776
	* gcc.dg/vect/vect-simd-clone-24.c: Add -mprefer-vector-width=512.
---

diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c
index 35459d5d5b9..5281dfa0a02 100644
--- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c
+++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c
@@ -2,7 +2,7 @@
 /* { dg-skip-if "" { *-*-* } { "-flto" } { "" } } */
 /* { dg-require-effective-target vect_simd_clones } */
 /* { dg-additional-options "-fopenmp-simd --param vect-partial-vector-usage=1 -fdump-tree-dce6 -w" } */
-/* { dg-additional-options "-mavx512f" { target avx512f } } */
+/* { dg-additional-options "-mavx512f -mprefer-vector-width=512" { target avx512f } } */
 
 #pragma omp declare simd simdlen(16)
 int __attribute__((const)) baz (int x);