From: Michael Brown <mcb30@ipxe.org>
Date: Wed, 7 May 2025 11:56:20 +0000 (+0100)
Subject: [riscv] Provide a millicode variant of print_message()
X-Git-Tag: rolling/bin~321
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9445a9ff40ba72a14f38d2bf492a4915d6d913aa;p=thirdparty%2Fipxe.git

[riscv] Provide a millicode variant of print_message()

RISC-V has a millicode calling convention that allows for the use of
an alternative link register x5/t0.  With sufficient care, this allows
for two levels of subroutine call even when no stack is available.

Provide both standard and millicode entry points for print_message(),
and use the millicode entry point to allow for printing debug messages
from libprefix.S itself.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
---

diff --git a/src/arch/riscv/prefix/libprefix.S b/src/arch/riscv/prefix/libprefix.S
index 21b39526f..a5b3cabd6 100644
--- a/src/arch/riscv/prefix/libprefix.S
+++ b/src/arch/riscv/prefix/libprefix.S
@@ -54,12 +54,12 @@ prefix_virt:
  * to know the current virtual-physical address translation.  It does
  * not require a valid stack.
  *
- * Note that the parameter is passed in register t0 (rather than a0)
+ * Note that the parameter is passed in register t1 (rather than a0)
  * and all non-temporary registers are preserved.
  *
  * Parameters:
  *
- *   t0 - Pointer to string
+ *   t1 - Pointer to string
  *
  * Returns: none
  *
@@ -72,37 +72,55 @@ prefix_virt:
 	.section ".prefix.print_message", "ax", @progbits
 	.globl	print_message
 print_message:
+	/* Handle alternate link register */
+	mv	t0, ra
+print_message_alt:
 	/* Register usage:
 	 *
 	 * t0 - character pointer
 	 * a0 - current character
-	 * t1 - preserved a0
-	 * t2 - preserved a1
-	 * t3 - preserved a6
-	 * t4 - preserved a7
+	 * t2 - preserved a0
+	 * t3 - preserved a1
+	 * t4 - preserved a6
+	 * t5 - preserved a7
 	 */
-	mv	t1, a0
-	mv	t2, a1
-	mv	t3, a6
-	mv	t4, a7
+	mv	t2, a0
+	mv	t3, a1
+	mv	t4, a6
+	mv	t5, a7
 
 1:	/* Print each character in turn */
-	lbu	a0, (t0)
-	addi	t0, t0, 1
+	lbu	a0, (t1)
+	addi	t1, t1, 1
 	beqz	a0, 2f
 	li	a7, SBI_DBCN
 	li	a6, SBI_DBCN_WRITE_BYTE
 	ecall
 	j	1b
 2:
-	/* Restore registers and return */
-	mv	a7, t4
-	mv	a6, t3
-	mv	a1, t2
-	mv	a0, t1
-	ret
+	/* Restore registers and return (via alternate link register) */
+	mv	a7, t5
+	mv	a6, t4
+	mv	a1, t3
+	mv	a0, t2
+	jr	t0
 	.size	print_message, . - print_message
 
+	/*
+	 * Display progress message (if debugging is enabled)
+	 */
+	.macro	progress message
+#ifndef NDEBUG
+	.section ".rodata.progress_\@", "a", @progbits
+progress_\@:
+	.asciz	"\message"
+	.size	progress_\@, . - progress_\@
+	.previous
+	la	t1, progress_\@
+	jal	t0, print_message_alt
+#endif
+	.endm
+
 /*****************************************************************************
  *
  * Apply compressed relocation records
diff --git a/src/arch/riscv/prefix/sbiprefix.S b/src/arch/riscv/prefix/sbiprefix.S
index 6bac31540..a02d66bd6 100644
--- a/src/arch/riscv/prefix/sbiprefix.S
+++ b/src/arch/riscv/prefix/sbiprefix.S
@@ -45,12 +45,12 @@
 	 */
 	.macro	progress message
 #ifndef NDEBUG
-	.section ".rodata", "a", @progbits
+	.section ".rodata.progress_\@", "a", @progbits
 progress_\@:
 	.asciz	"\message"
 	.size	progress_\@, . - progress_\@
 	.previous
-	la	t0, progress_\@
+	la	t1, progress_\@
 	call	print_message
 #endif
 	.endm