From: Uros Bizjak Date: Fri, 4 May 2012 18:43:10 +0000 (+0200) Subject: backport: re PR target/53228 (target attributes in libcpp/lex.c cause illegal instruc... X-Git-Tag: releases/gcc-4.5.4~113 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=94df37a177952a34890c0ede373e494556981acd;p=thirdparty%2Fgcc.git backport: re PR target/53228 (target attributes in libcpp/lex.c cause illegal instructions to be used elsewhere) Backport from mainline 2012-05-04 Uros Bizjak PR target/53228 * config/i386/i386.h (X86_ARCH_CMOV): Rename from X86_ARCH_CMOVE. (TARGET_CMOV): Rename from TARGET_CMOVE. (TARGET_CMOVE): New define. * config/i386/i386.c (override_options): Use TARGET_CMOV. Do not set TARGET_CMOVE here. From-SVN: r187172 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c888687c3b85..5bcdb70f9f6d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2012-05-04 Uros Bizjak + + Backport from mainline + 2012-05-04 Uros Bizjak + + PR target/53228 + * config/i386/i386.h (X86_ARCH_CMOV): Rename from X86_ARCH_CMOVE. + (TARGET_CMOV): Rename from TARGET_CMOVE. + (TARGET_CMOVE): New define. + * config/i386/i386.c (override_options): Use TARGET_CMOV. + Do not set TARGET_CMOVE here. + 2012-05-03 Michael Meissner Backport from the mainline diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 9b29d5b7d620..2e7d878e5080 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -1541,7 +1541,7 @@ unsigned char ix86_arch_features[X86_ARCH_LAST]; /* Feature tests against the various architecture variations, used to create ix86_arch_features based on the processor mask. */ static unsigned int initial_ix86_arch_features[X86_ARCH_LAST] = { - /* X86_ARCH_CMOVE: Conditional move was added for pentiumpro. */ + /* X86_ARCH_CMOV: Conditional move was added for pentiumpro. */ ~(m_386 | m_486 | m_PENT | m_K6), /* X86_ARCH_CMPXCHG: Compare and exchange was added for 80486. */ @@ -3072,7 +3072,7 @@ override_options (bool main_args_p) -mtune (rather than -march) points us to a processor that has them. However, the VIA C3 gives a SIGILL, so we only do that for i686 and higher processors. */ - if (TARGET_CMOVE + if (TARGET_CMOV && (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE))) x86_prefetch_sse = true; break; @@ -3401,11 +3401,6 @@ override_options (bool main_args_p) target_flags |= MASK_ACCUMULATE_OUTGOING_ARGS; } - /* For sane SSE instruction set generation we need fcomi instruction. - It is safe to enable all CMOVE instructions. */ - if (TARGET_SSE) - TARGET_CMOVE = 1; - /* Figure out what ASM_GENERATE_INTERNAL_LABEL builds as a prefix. */ { char *p; diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 2dc22fac7599..28c92f7930af 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -397,7 +397,7 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; /* Feature tests against the various architecture variations. */ enum ix86_arch_indices { - X86_ARCH_CMOVE, /* || TARGET_SSE */ + X86_ARCH_CMOV, X86_ARCH_CMPXCHG, X86_ARCH_CMPXCHG8B, X86_ARCH_XADD, @@ -408,12 +408,16 @@ enum ix86_arch_indices { extern unsigned char ix86_arch_features[X86_ARCH_LAST]; -#define TARGET_CMOVE ix86_arch_features[X86_ARCH_CMOVE] +#define TARGET_CMOV ix86_arch_features[X86_ARCH_CMOV] #define TARGET_CMPXCHG ix86_arch_features[X86_ARCH_CMPXCHG] #define TARGET_CMPXCHG8B ix86_arch_features[X86_ARCH_CMPXCHG8B] #define TARGET_XADD ix86_arch_features[X86_ARCH_XADD] #define TARGET_BSWAP ix86_arch_features[X86_ARCH_BSWAP] +/* For sane SSE instruction set generation we need fcomi instruction. + It is safe to enable all CMOVE instructions. */ +#define TARGET_CMOVE (TARGET_CMOV || TARGET_SSE) + #define TARGET_FISTTP (TARGET_SSE3 && TARGET_80387) extern int x86_prefetch_sse;