From: Julian Seward Date: Fri, 3 May 2002 20:52:53 +0000 (+0000) Subject: Improve accuracy of simulation of bsf/bsr instructions when the word X-Git-Tag: svn/VALGRIND_1_0_3~249 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=95a32b6cd656d1530ea30aa128db276df6211741;p=thirdparty%2Fvalgrind.git Improve accuracy of simulation of bsf/bsr instructions when the word being scanned is zero. (Zoltan Hidvegi) git-svn-id: svn://svn.valgrind.org/valgrind/trunk@205 --- diff --git a/coregrind/vg_helpers.S b/coregrind/vg_helpers.S index e802081154..62db9ec1d7 100644 --- a/coregrind/vg_helpers.S +++ b/coregrind/vg_helpers.S @@ -343,16 +343,18 @@ VG_(helper_DAA): .global VG_(helper_bsr) VG_(helper_bsr): pushl %eax + movl 12(%esp), %eax bsrl 8(%esp), %eax - movl %eax, 8(%esp) + movl %eax, 12(%esp) popl %eax ret .global VG_(helper_bsf) VG_(helper_bsf): pushl %eax + movl 12(%esp), %eax bsfl 8(%esp), %eax - movl %eax, 8(%esp) + movl %eax, 12(%esp) popl %eax ret diff --git a/coregrind/vg_to_ucode.c b/coregrind/vg_to_ucode.c index 691ef26d67..4be838c193 100644 --- a/coregrind/vg_to_ucode.c +++ b/coregrind/vg_to_ucode.c @@ -2758,7 +2758,7 @@ Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op ) static Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) { - Int t, ta, helper; + Int t, t1, ta, helper; UInt pair; UChar dis_buf[50]; UChar modrm; @@ -2768,8 +2768,13 @@ Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) helper = fwds ? VGOFF_(helper_bsf) : VGOFF_(helper_bsr); modrm = getUChar(eip); + t1 = newTemp(cb); t = newTemp(cb); + uInstr0(cb, CALLM_S, 0); + uInstr2(cb, GET, sz, ArchReg, gregOfRM(modrm), TempReg, t1); + uInstr1(cb, PUSH, sz, TempReg, t1); + if (epartIsReg(modrm)) { eip++; uInstr2(cb, GET, sz, ArchReg, eregOfRM(modrm), TempReg, t); @@ -2790,11 +2795,11 @@ Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) nameIReg(sz, gregOfRM(modrm))); } - uInstr0(cb, CALLM_S, 0); uInstr1(cb, PUSH, sz, TempReg, t); uInstr1(cb, CALLM, 0, Lit16, helper); uFlagsRWU(cb, FlagsEmpty, FlagZ, FlagsOSACP); uInstr1(cb, POP, sz, TempReg, t); + uInstr1(cb, POP, sz, TempReg, t); uInstr2(cb, PUT, sz, TempReg, t, ArchReg, gregOfRM(modrm)); uInstr0(cb, CALLM_E, 0); diff --git a/vg_helpers.S b/vg_helpers.S index e802081154..62db9ec1d7 100644 --- a/vg_helpers.S +++ b/vg_helpers.S @@ -343,16 +343,18 @@ VG_(helper_DAA): .global VG_(helper_bsr) VG_(helper_bsr): pushl %eax + movl 12(%esp), %eax bsrl 8(%esp), %eax - movl %eax, 8(%esp) + movl %eax, 12(%esp) popl %eax ret .global VG_(helper_bsf) VG_(helper_bsf): pushl %eax + movl 12(%esp), %eax bsfl 8(%esp), %eax - movl %eax, 8(%esp) + movl %eax, 12(%esp) popl %eax ret diff --git a/vg_to_ucode.c b/vg_to_ucode.c index 691ef26d67..4be838c193 100644 --- a/vg_to_ucode.c +++ b/vg_to_ucode.c @@ -2758,7 +2758,7 @@ Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op ) static Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) { - Int t, ta, helper; + Int t, t1, ta, helper; UInt pair; UChar dis_buf[50]; UChar modrm; @@ -2768,8 +2768,13 @@ Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) helper = fwds ? VGOFF_(helper_bsf) : VGOFF_(helper_bsr); modrm = getUChar(eip); + t1 = newTemp(cb); t = newTemp(cb); + uInstr0(cb, CALLM_S, 0); + uInstr2(cb, GET, sz, ArchReg, gregOfRM(modrm), TempReg, t1); + uInstr1(cb, PUSH, sz, TempReg, t1); + if (epartIsReg(modrm)) { eip++; uInstr2(cb, GET, sz, ArchReg, eregOfRM(modrm), TempReg, t); @@ -2790,11 +2795,11 @@ Addr dis_bs_E_G ( UCodeBlock* cb, Int sz, Addr eip, Bool fwds ) nameIReg(sz, gregOfRM(modrm))); } - uInstr0(cb, CALLM_S, 0); uInstr1(cb, PUSH, sz, TempReg, t); uInstr1(cb, CALLM, 0, Lit16, helper); uFlagsRWU(cb, FlagsEmpty, FlagZ, FlagsOSACP); uInstr1(cb, POP, sz, TempReg, t); + uInstr1(cb, POP, sz, TempReg, t); uInstr2(cb, PUT, sz, TempReg, t, ArchReg, gregOfRM(modrm)); uInstr0(cb, CALLM_E, 0);