From: Ville Syrjälä Date: Wed, 28 Oct 2020 21:33:22 +0000 (+0200) Subject: drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+ X-Git-Tag: v5.11-rc1~206^2~14^2~3 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9696f041910284041a39c81afbd8809d6d781cda;p=thirdparty%2Flinux.git drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+ No reason not to use GEN3_IRQ_INIT() on icp+. Reviewed-by: Lucas De Marchi Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20201028213323.5423-19-ville.syrjala@linux.intel.com --- diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 321a447c521bf..2cbab31cfd006 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3741,14 +3741,10 @@ static void gen8_irq_postinstall(struct drm_i915_private *dev_priv) static void icp_irq_postinstall(struct drm_i915_private *dev_priv) { + struct intel_uncore *uncore = &dev_priv->uncore; u32 mask = SDE_GMBUS_ICP; - drm_WARN_ON(&dev_priv->drm, I915_READ(SDEIER) != 0); - I915_WRITE(SDEIER, 0xffffffff); - POSTING_READ(SDEIER); - - gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR); - I915_WRITE(SDEIMR, ~mask); + GEN3_IRQ_INIT(uncore, SDE, ~mask, 0xffffffff); } static void gen11_irq_postinstall(struct drm_i915_private *dev_priv)