From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Sun, 6 Jul 2025 06:55:09 +0000 (+0200)
Subject: 6.1-stable patches
X-Git-Tag: v6.1.143~2
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=978fcce63d5d421a36f4494752036ab03d70c97c;p=thirdparty%2Fkernel%2Fstable-queue.git

6.1-stable patches

added patches:
	arm-9354-1-ptrace-use-bitfield-helpers.patch
---

diff --git a/queue-6.1/arm-9354-1-ptrace-use-bitfield-helpers.patch b/queue-6.1/arm-9354-1-ptrace-use-bitfield-helpers.patch
new file mode 100644
index 0000000000..cd09cc44f2
--- /dev/null
+++ b/queue-6.1/arm-9354-1-ptrace-use-bitfield-helpers.patch
@@ -0,0 +1,44 @@
+From b36e78b216e632d90138751e4ff80044de303656 Mon Sep 17 00:00:00 2001
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+Date: Mon, 26 Feb 2024 12:25:01 +0100
+Subject: ARM: 9354/1: ptrace: Use bitfield helpers
+
+From: Geert Uytterhoeven <geert+renesas@glider.be>
+
+commit b36e78b216e632d90138751e4ff80044de303656 upstream.
+
+The isa_mode() macro extracts two fields, and recombines them into a
+single value.
+
+Make this more obvious by using the FIELD_GET() helper, and shifting the
+result into its final resting place.
+
+Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
+Reviewed-by: Oleg Nesterov <oleg@redhat.com>
+Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm/include/asm/ptrace.h |    5 +++--
+ 1 file changed, 3 insertions(+), 2 deletions(-)
+
+--- a/arch/arm/include/asm/ptrace.h
++++ b/arch/arm/include/asm/ptrace.h
+@@ -10,6 +10,7 @@
+ #include <uapi/asm/ptrace.h>
+ 
+ #ifndef __ASSEMBLY__
++#include <linux/bitfield.h>
+ #include <linux/types.h>
+ 
+ struct pt_regs {
+@@ -35,8 +36,8 @@ struct svc_pt_regs {
+ 
+ #ifndef CONFIG_CPU_V7M
+ #define isa_mode(regs) \
+-	((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
+-	 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
++	(FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1 | \
++	 FIELD_GET(PSR_T_BIT, (regs)->ARM_cpsr))
+ #else
+ #define isa_mode(regs) 1 /* Thumb */
+ #endif
diff --git a/queue-6.1/series b/queue-6.1/series
index ff6ba8d4fb..6ce0f0b17e 100644
--- a/queue-6.1/series
+++ b/queue-6.1/series
@@ -128,3 +128,4 @@ io_uring-kbuf-account-ring-io_buffer_list-memory.patch
 firmware-arm_scmi-add-a-common-helper-to-check-if-a-message-is-supported.patch
 firmware-arm_scmi-ensure-that-the-message-id-supports-fastchannel.patch
 arm64-restrict-pagetable-teardown-to-avoid-false-warning.patch
+arm-9354-1-ptrace-use-bitfield-helpers.patch