From: VMware, Inc <> Date: Thu, 24 Feb 2011 21:47:58 +0000 (-0800) Subject: Changes in shared code that don't affect open-vm-tools functionality. X-Git-Tag: 2011.02.23-368700~48 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=98047ea094cc59b463ed4a7615d21db74cc89862;p=thirdparty%2Fopen-vm-tools.git Changes in shared code that don't affect open-vm-tools functionality. Signed-off-by: Marcelo Vanzin --- diff --git a/open-vm-tools/lib/include/x86cpuid.h b/open-vm-tools/lib/include/x86cpuid.h index 5a258eb3c..879101538 100644 --- a/open-vm-tools/lib/include/x86cpuid.h +++ b/open-vm-tools/lib/include/x86cpuid.h @@ -115,6 +115,7 @@ CPUIDQuery; CPUIDLEVEL(TRUE, 1, 1) \ CPUIDLEVEL(FALSE, 5, 5) \ CPUIDLEVEL(TRUE, 7, 7) \ + CPUIDLEVEL(FALSE, A, 0xA) \ CPUIDLEVEL(TRUE, D, 0xD) \ CPUIDLEVEL(FALSE,400, 0x40000000) \ CPUIDLEVEL(FALSE,410, 0x40000010) \ @@ -127,7 +128,6 @@ CPUIDQuery; #define CPUID_UNCACHED_LEVELS \ CPUIDLEVEL(FALSE, 4, 4) \ CPUIDLEVEL(FALSE, 6, 6) \ - CPUIDLEVEL(FALSE, A, 0xA) \ CPUIDLEVEL(FALSE, B, 0xB) \ CPUIDLEVEL(FALSE, 85, 0x80000005) \ CPUIDLEVEL(FALSE, 86, 0x80000006) \ @@ -389,20 +389,20 @@ FLAGDEF( 7, EBX, INTEL, 7, 1, SMEP, NO, FALSE) \ FLAGDEF( 7, EBX, INTEL, 9, 1, ENFSTRG, YES, TRUE) /* LEVEL, REG, VENDOR, POS, SIZE, NAME, MON SUPP, CPL3, [FUNC] */ -#define CPUID_FIELD_DATA_LEVEL_A \ -FIELDDEFA( A, EAX, INTEL, 0, 8, PMC_VERSION, NA, FALSE, PMC_VERSION) \ -FIELDDEFA( A, EAX, INTEL, 8, 8, NUM_PMCS, NA, FALSE, NUM_PMCS) \ -FIELDDEF( A, EAX, INTEL, 16, 8, PMC_BIT_WIDTH, NA, FALSE) \ -FIELDDEFA( A, EAX, INTEL, 24, 8, PMC_EBX_LENGTH, NA, FALSE, PMC_EBX_LENGTH) \ -FLAGDEF( A, EBX, INTEL, 0, 1, PMC_CORE_CYCLE, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 1, 1, PMC_INSTR_RETIRED, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 2, 1, PMC_REF_CYCLES, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 3, 1, PMC_LAST_LVL_CREF, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 4, 1, PMC_LAST_LVL_CMISS, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 5, 1, PMC_BR_INST_RETIRED, NA, FALSE) \ -FLAGDEF( A, EBX, INTEL, 6, 1, PMC_BR_MISS_RETIRED, NA, FALSE) \ -FIELDDEFA( A, EDX, INTEL, 0, 5, PMC_FIXED_NUM, NA, FALSE, NUM_FIXED_PMCS) \ -FIELDDEF( A, EDX, INTEL, 5, 8, PMC_FIXED_SIZE, NA, FALSE) +#define CPUID_FIELD_DATA_LEVEL_A \ +FIELDDEFA( A, EAX, INTEL, 0, 8, PMC_VERSION, NA, FALSE, PMC_VERSION) \ +FIELDDEFA( A, EAX, INTEL, 8, 8, PMC_NUM_GEN, NA, FALSE, PMC_NUM_GEN) \ +FIELDDEFA( A, EAX, INTEL, 16, 8, PMC_WIDTH_GEN, NA, FALSE, PMC_WIDTH_GEN) \ +FIELDDEFA( A, EAX, INTEL, 24, 8, PMC_EBX_LENGTH, NA, FALSE, PMC_EBX_LENGTH) \ +FLAGDEFA( A, EBX, INTEL, 0, 1, PMC_CORE_CYCLES, NA, FALSE, PMC_CORE_CYCLES) \ +FLAGDEFA( A, EBX, INTEL, 1, 1, PMC_INSTR_RETIRED, NA, FALSE, PMC_INSTR_RETIRED) \ +FLAGDEFA( A, EBX, INTEL, 2, 1, PMC_REF_CYCLES, NA, FALSE, PMC_REF_CYCLES) \ +FLAGDEFA( A, EBX, INTEL, 3, 1, PMC_LAST_LVL_CREF, NA, FALSE, PMC_LAST_LVL_CREF) \ +FLAGDEFA( A, EBX, INTEL, 4, 1, PMC_LAST_LVL_CMISS, NA, FALSE, PMC_LAST_LVL_CMISS) \ +FLAGDEFA( A, EBX, INTEL, 5, 1, PMC_BR_INST_RETIRED, NA, FALSE, PMC_BR_INST_RETIRED) \ +FLAGDEFA( A, EBX, INTEL, 6, 1, PMC_BR_MISS_RETIRED, NA, FALSE, PMC_BR_MISS_RETIRED) \ +FIELDDEFA( A, EDX, INTEL, 0, 5, PMC_NUM_FIXED, NA, FALSE, PMC_NUM_FIXED) \ +FIELDDEFA( A, EDX, INTEL, 5, 8, PMC_WIDTH_FIXED, NA, FALSE, PMC_WIDTH_FIXED) /* LEVEL, REG, VENDOR, POS, SIZE, NAME, MON SUPP, CPL3, [FUNC] */ #define CPUID_FIELD_DATA_LEVEL_B \ @@ -782,7 +782,6 @@ FIELD_FUNC(INTEL_CORE_COUNT, CPUID_INTEL_ID4EAX_CORE_COUNT) FIELD_FUNC(AMD_CORE_COUNT, CPUID_AMD_ID88ECX_CORE_COUNT) FIELD_FUNC(AMD_APICID_COREID_SIZE, CPUID_AMD_ID88ECX_APICID_COREID_SIZE) FIELD_FUNC(AMD_EXTAPICSPC, CPUID_AMD_ID81ECX_EXTAPICSPC) -FIELD_FUNC(NUM_PMCS, CPUID_INTEL_IDAEAX_NUM_PMCS) FIELD_FUNC(MWAIT_MIN_SIZE, CPUID_COMMON_ID5EAX_MWAIT_MIN_SIZE) FIELD_FUNC(MWAIT_MAX_SIZE, CPUID_COMMON_ID5EBX_MWAIT_MAX_SIZE) FIELD_FUNC(MWAIT_C0_SUBSTATE, CPUID_INTEL_ID5EDX_MWAIT_C0_SUBSTATE)