From: Rob Herring (Arm) Date: Mon, 11 May 2026 16:59:36 +0000 (-0500) Subject: dt-bindings: Consolidate "sram" property definition X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=98e2a77b5d2c19f7a1bf2924ed2701035f214411;p=thirdparty%2Flinux.git dt-bindings: Consolidate "sram" property definition The "sram" property has become a de facto standard property, so create a common schema for it and drop all the duplicated definitions. Reviewed-by: Linus Walleij Acked-by: Jakub Kicinski Acked-by: Mark Brown Reviewed-by: Liu Ying #fsl,imx8qxp-dc-command-sequencer.yaml Acked-by: Lorenzo Bianconi Acked-by: Vinod Koul Acked-by: Dmitry Baryshkov # display/msm Reviewed-by: Krzysztof Kozlowski Reviewed-by: Tanmay Shah Link: https://patch.msgid.link/20260511165942.2774868-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) --- diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml index 27118f4c0d281..fd095e5742c51 100644 --- a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml @@ -41,7 +41,7 @@ properties: - const: sw3 sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: phandle pointing to the mmio-sram device node required: diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 04b2328903ca1..358759fad8dc7 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -84,13 +84,9 @@ properties: maxItems: 64 sram: - $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 - items: - maxItems: 1 - description: | - phandles to one or more reserved on-chip SRAM regions. + description: phandle to the On Chip Memory (OCMEM) that's present on some a3xx and a4xx Snapdragon SoCs. See Documentation/devicetree/bindings/sram/qcom,ocmem.yaml diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml index 607da11e7baa9..d8f92838f4c9d 100644 --- a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml +++ b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml @@ -136,13 +136,9 @@ properties: maxItems: 1 sram: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: A phandle array with inner size 1 (no arg cells). - First phandle is the LCPA (Logical Channel Parameter Address) memory. - Second phandle is the LCLA (Logical Channel Link base Address) memory. - maxItems: 2 items: - maxItems: 1 + - description: LCPA (Logical Channel Parameter Address) memory. + - description: LCLA (Logical Channel Link base Address) memory. memcpy-channels: $ref: /schemas/types.yaml#/definitions/uint32-array diff --git a/Documentation/devicetree/bindings/media/cnm,wave521c.yaml b/Documentation/devicetree/bindings/media/cnm,wave521c.yaml index 6a11c1d11fb5f..6cd33dfd095d6 100644 --- a/Documentation/devicetree/bindings/media/cnm,wave521c.yaml +++ b/Documentation/devicetree/bindings/media/cnm,wave521c.yaml @@ -37,7 +37,7 @@ properties: maxItems: 1 sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: The VPU uses the SRAM to store some of the reference data instead of storing it on DMA memory. It is mainly used for the purpose of reducing diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml index 18cc6315a8212..6ba668aa633d7 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml @@ -56,10 +56,10 @@ properties: maxItems: 5 # Wrapper and 4 slots sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: - Optional phandle to a reserved on-chip SRAM regions. The SRAM can - be used for descriptor storage, which may improve bus utilization. + The SRAM can be used for descriptor storage, which may improve bus + utilization. required: - compatible diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml index 42022401d0ffa..4f38a0ef29d84 100644 --- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml @@ -91,9 +91,8 @@ properties: maxItems: 1 sram: - $ref: /schemas/types.yaml#/definitions/phandle - description: | - phandle to a reserved on-chip SRAM regions. + maxItems: 1 + description: Some SoCs, like rk3588 provide on-chip SRAM to store temporary buffers during decoding. diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml index d9fbb90b0977d..7c2ddd27780f6 100644 --- a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml +++ b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml @@ -47,10 +47,10 @@ properties: maxItems: 1 sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: - phandle to a reserved SRAM region which is used as temporary - storage memory between DMA and MDMA engines. + SRAM region which is used as temporary storage memory between DMA and + MDMA engines. port: $ref: /schemas/graph.yaml#/$defs/port-base diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml index cc346946291af..6bbd83c6aaf74 100644 --- a/Documentation/devicetree/bindings/net/mediatek,net.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,net.yaml @@ -67,8 +67,7 @@ properties: - const: ppe sram: - $ref: /schemas/types.yaml#/definitions/phandle - description: phandle to mmio SRAM + maxItems: 1 mediatek,ethsys: $ref: /schemas/types.yaml#/definitions/phandle diff --git a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml index c296e57118484..883033b19b8f3 100644 --- a/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml @@ -21,7 +21,7 @@ properties: - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: phandle to MSMC SRAM node diff --git a/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml index a98ad45ca66f2..9370c43bc66a6 100644 --- a/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml +++ b/Documentation/devicetree/bindings/net/ti,icssm-prueth.yaml @@ -24,7 +24,7 @@ properties: - ti,am3359-prueth # for AM33x SoC family sram: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 description: phandle to OCMC SRAM node diff --git a/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml b/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml index 76e8ca44906ac..3f710433e9377 100644 --- a/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml @@ -48,12 +48,7 @@ properties: minItems: 1 sram: - $ref: /schemas/types.yaml#/definitions/phandle - description: - phandles to a reserved SRAM region which is used as the memory of - the ARC core. The region should be defined as child nodes of the - AHB SRAM node as per the generic bindings in - Documentation/devicetree/bindings/sram/sram.yaml + maxItems: 1 amlogic,secbus2: $ref: /schemas/types.yaml#/definitions/phandle diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml index b51bb863d759e..8b1ed384ef22e 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml @@ -75,16 +75,8 @@ properties: # -------------------- sram: - $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 - items: - maxItems: 1 - description: | - phandles to one or more reserved on-chip SRAM regions. The regions - should be defined as child nodes of the respective SRAM node, and - should be defined as per the generic bindings in, - Documentation/devicetree/bindings/sram/sram.yaml allOf: - if: diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml index 775e9b3a19387..14e6b2f817b31 100644 --- a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml @@ -224,16 +224,8 @@ patternProperties: at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted. sram: - $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 4 - items: - maxItems: 1 - description: | - phandles to one or more reserved on-chip SRAM regions. The regions - should be defined as child nodes of the respective SRAM node, and - should be defined as per the generic bindings in, - Documentation/devicetree/bindings/sram/sram.yaml required: - compatible diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml index ee63c03949c93..c7d5e58330d64 100644 --- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml @@ -106,20 +106,13 @@ patternProperties: - const: rx sram: - $ref: /schemas/types.yaml#/definitions/phandle-array minItems: 1 maxItems: 8 - items: - maxItems: 1 - description: | + description: phandles to one or more reserved on-chip SRAM regions. Other than TCM, the RPU can execute instructions and access data from the OCM memory, the main DDR memory, and other system memories. - The regions should be defined as child nodes of the respective SRAM - node, and should be defined as per the generic bindings in - Documentation/devicetree/bindings/sram/sram.yaml - memory-region: description: | List of phandles to the reserved memory regions associated with the diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml index 472e92974714b..6d7d595e4ab31 100644 --- a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml +++ b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml @@ -89,12 +89,10 @@ properties: - const: rxm2m sram: - $ref: /schemas/types.yaml#/definitions/phandle - description: | - Phandles to a reserved SRAM region which is used as temporary - storage memory between DMA and MDMA engines. - The region should be defined as child node of the AHB SRAM node - as per the generic bindings in Documentation/devicetree/bindings/sram/sram.yaml + maxItems: 1 + description: + SRAM region which is used as temporary storage memory between DMA and + MDMA engines. power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/sram/sram-consumer.yaml b/Documentation/devicetree/bindings/sram/sram-consumer.yaml new file mode 100644 index 0000000000000..f00087bd2879b --- /dev/null +++ b/Documentation/devicetree/bindings/sram/sram-consumer.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sram/sram-consumer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SRAM Consumers + +maintainers: + - Rob Herring + +select: true + +properties: + sram: + description: + Phandles to one or more reserved on-chip SRAM regions. The regions + should be defined as child nodes of the respective SRAM node, and + should be defined as per the generic bindings in, + Documentation/devicetree/bindings/sram/sram.yaml + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 + +additionalProperties: true +...