From: Jan Hubicka <jh@suse.cz>
Date: Fri, 26 Mar 2004 17:28:27 +0000 (+0100)
Subject: re PR target/14723 ([3.4 only] Backported -march=nocona from mainline)
X-Git-Tag: releases/gcc-3.3.4~126
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9a2c3d154d301c424e17575fc1093bcc6f0af43c;p=thirdparty%2Fgcc.git

re PR target/14723 ([3.4 only] Backported -march=nocona from mainline)

2004-03-26  Jan Hubicka  <jh@suse.cz>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR Target/14723
	* config.gcc: Add support --with-cpu=nocona.

	* config/i386/i386.c (override_options): Add support for
	Prescott and Nocona.

	* doc/invoke.texi: Extend documentation of -mcpu/-march for new
	CPUs.

Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>

From-SVN: r79988
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cd9e859c7188..7fedfb4341d2 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2004-03-26  Jan Hubicka  <jh@suse.cz>
+	    H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR Target/14723
+	* config.gcc: Add support --with-cpu=nocona.
+
+	* config/i386/i386.c (override_options): Add support for
+	Prescott and Nocona.
+
+	* doc/invoke.texi: Extend documentation of -mcpu/-march for new
+	CPUs.
+
 2004-03-25  Jakub Jelinek  <jakub@redhat.com>
 
 	* config.gcc (sparc-*-linux*): Add sparc/t-linux to tmake_file.
diff --git a/gcc/config.gcc b/gcc/config.gcc
index e5ad3414b522..613f4e33164b 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -2827,7 +2827,25 @@ x86_64-*-*)
 	# We should have hammer chip here, but it does not exist yet and
 	# thus it is not supported.  Athlon_SSE is probably equivalent feature
 	# wise to hammer from our point of view except for 64bit mode.
-	target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
+	case "x$with_cpu" in
+		x)
+			target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
+			;;
+		xnocona)
+			target_cpu_default2=TARGET_CPU_DEFAULT_pentium4
+			;;
+		xyes|xno)
+			echo "--with-cpu must be passed a value" 1>&2
+			exit 1
+			;;
+		*)
+			if test x$pass2done = xyes
+			then
+				echo "Unknown cpu used with --with-cpu=$with_cpu" 1>&2
+				exit 1
+			fi
+			;;
+	esac
 	;;
 alpha*-*-*)
 	case $machine in
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3e1aa83b2d38..171e9b6b1b78 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -975,9 +975,10 @@ override_options ()
 	{
 	  PTA_SSE = 1,
 	  PTA_SSE2 = 2,
-	  PTA_MMX = 4,
-	  PTA_PREFETCH_SSE = 8,
-	  PTA_3DNOW = 16,
+	  PTA_SSE3 = 4,
+	  PTA_MMX = 8,
+	  PTA_PREFETCH_SSE = 16,
+	  PTA_3DNOW = 32,
 	  PTA_3DNOW_A = 64
 	} flags;
     }
@@ -995,8 +996,12 @@ override_options ()
       {"pentiumpro", PROCESSOR_PENTIUMPRO, 0},
       {"pentium2", PROCESSOR_PENTIUMPRO, PTA_MMX},
       {"pentium3", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE},
-      {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 |
-				       PTA_MMX | PTA_PREFETCH_SSE},
+      {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2
+				       | PTA_MMX | PTA_PREFETCH_SSE},
+      {"prescott", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 | PTA_SSE3
+				       | PTA_MMX | PTA_PREFETCH_SSE},
+      {"nocona", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 | PTA_SSE3
+				     | PTA_MMX | PTA_PREFETCH_SSE},
       {"k6", PROCESSOR_K6, PTA_MMX},
       {"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
       {"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
@@ -1114,6 +1119,9 @@ override_options ()
 	if (processor_alias_table[i].flags & PTA_SSE2
 	    && !(target_flags_explicit & MASK_SSE2))
 	  target_flags |= MASK_SSE2;
+	if (processor_alias_table[i].flags & PTA_SSE3
+	    && !(target_flags_explicit & MASK_SSE3))
+	  target_flags |= MASK_SSE3;
 	if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
 	  x86_prefetch_sse = true;
 	break;
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 9cd3752ede1d..bcba7c4175d3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -7849,7 +7849,8 @@ Tune to @var{cpu-type} everything applicable about the generated code, except
 for the ABI and the set of available instructions.  The choices for
 @var{cpu-type} are @samp{i386}, @samp{i486}, @samp{i586}, @samp{i686},
 @samp{pentium}, @samp{pentium-mmx}, @samp{pentiumpro}, @samp{pentium2},
-@samp{pentium3}, @samp{pentium4}, @samp{k6}, @samp{k6-2}, @samp{k6-3},
+@samp{pentium3}, @samp{pentium4}, @samp{prescott}, @samp{nocona},
+@samp{k6}, @samp{k6-2}, @samp{k6-3},
 @samp{athlon}, @samp{athlon-tbird}, @samp{athlon-4}, @samp{athlon-xp},
 @samp{athlon-mp}, @samp{winchip-c6}, @samp{winchip2} and @samp{c3}.