From: Andrea Corallo Date: Thu, 6 Oct 2022 13:43:51 +0000 (+0200) Subject: arm: improve vcreateq* tests X-Git-Tag: basepoints/gcc-14~2889 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9a79b522e0663a202a288db56ebcbdcdb48bdaca;p=thirdparty%2Fgcc.git arm: improve vcreateq* tests gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vcreateq_f16.c: Improve test. * gcc.target/arm/mve/intrinsics/vcreateq_f32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u64.c: Likewise. * gcc.target/arm/mve/intrinsics/vcreateq_u8.c: Likewise. --- diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c index fb3601edb944..c39303daa035 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f16.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ float16x8_t foo (uint64_t a, uint64_t b) { return vcreateq_f16 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +float16x8_t +foo1 () +{ + return vcreateq_f16 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c index 4f4da62eed76..ad66f4407cd8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_f32.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ /* { dg-add-options arm_v8_1m_mve_fp } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ float32x4_t foo (uint64_t a, uint64_t b) { return vcreateq_f32 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +float32x4_t +foo1 () +{ + return vcreateq_f32 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c index 103be6310bd9..7e70a4865131 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s16.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ int16x8_t foo (uint64_t a, uint64_t b) { return vcreateq_s16 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +int16x8_t +foo1 () +{ + return vcreateq_s16 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c index 96f7a972d93b..ffcfc80ff400 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s32.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ int32x4_t foo (uint64_t a, uint64_t b) { return vcreateq_s32 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +int32x4_t +foo1 () +{ + return vcreateq_s32 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c index 74c554506c0c..26642f9cd68a 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s64.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ int64x2_t foo (uint64_t a, uint64_t b) { return vcreateq_s64 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +int64x2_t +foo1 () +{ + return vcreateq_s64 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c index 03c50a0928a5..7e7e4d5948d3 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_s8.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ int8x16_t foo (uint64_t a, uint64_t b) { return vcreateq_s8 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +int8x16_t +foo1 () +{ + return vcreateq_s8 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c index 411cec8471e1..858a3a4546f4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u16.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ uint16x8_t foo (uint64_t a, uint64_t b) { return vcreateq_u16 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +uint16x8_t +foo1 () +{ + return vcreateq_u16 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c index 8bc8f60640e8..5f27cf688455 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u32.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ uint32x4_t foo (uint64_t a, uint64_t b) { return vcreateq_u32 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +uint32x4_t +foo1 () +{ + return vcreateq_u32 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c index e74641c32f34..78553dec7011 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u64.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ uint64x2_t foo (uint64_t a, uint64_t b) { return vcreateq_u64 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +uint64x2_t +foo1 () +{ + return vcreateq_u64 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c index de79f471d632..4a8ab61f865c 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vcreateq_u8.c @@ -1,13 +1,34 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +/* +**foo: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ uint8x16_t foo (uint64_t a, uint64_t b) { return vcreateq_u8 (a, b); } -/* { dg-final { scan-assembler "vmov" } } */ +/* +**foo1: +** ... +** vmov q[0-9+]\[2\], q[0-9+]\[0\], r[0-9+], r[0-9+] +** vmov q[0-9+]\[3\], q[0-9+]\[1\], r[0-9+], r[0-9+] +** ... +*/ +uint8x16_t +foo1 () +{ + return vcreateq_u8 (1, 1); +} + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file