From: Khem Raj <raj.khem@gmail.com>
Date: Wed, 14 Mar 2018 06:23:11 +0000 (-0700)
Subject: insane.bbclass: add support for RISC-V baremetal
X-Git-Tag: lucaceresoli/bug-15201-perf-libtraceevent-missing~18353
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9b30e805e769b6c8c12a9aba072f7df066b19179;p=thirdparty%2Fopenembedded%2Fopenembedded-core-contrib.git

insane.bbclass: add support for RISC-V baremetal

Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
---

diff --git a/meta/classes/insane.bbclass b/meta/classes/insane.bbclass
index 7407b29f867..7791a867f74 100644
--- a/meta/classes/insane.bbclass
+++ b/meta/classes/insane.bbclass
@@ -71,6 +71,8 @@ def package_qa_get_machine_dict(d):
                         "microblaze":  (189,   0,    0,          False,         32),
                         "microblazeeb":(189,   0,    0,          False,         32),
                         "microblazeel":(189,   0,    0,          True,          32),
+                        "riscv":      (243,    0,    0,          True,          32),
+                        "riscv64":    (243,    0,    0,          True,          64),
                       },
             "linux" : { 
                         "aarch64" :   (183,    0,    0,          True,          64),