From: Jonas Jelonek <jelonek.jonas@gmail.com>
Date: Sun, 9 Nov 2025 13:29:25 +0000 (+0000)
Subject: realtek: pcs: rtl839x: setup SerDes in PCS driver
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9c0dfa339f45e05217b6dc5068c51a7736547e09;p=thirdparty%2Fopenwrt.git

realtek: pcs: rtl839x: setup SerDes in PCS driver

Add the SerDes setup hooks in the PCS driver for RTL839x so that
pcs_config actually triggers configuration. Adjust the DTS of all
devices accordingly by adding pcs-handles and dropping phy-handles.

Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21360
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
---

diff --git a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
index 90d6db77aea..d43c1b2e88d 100644
--- a/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
+++ b/target/linux/realtek/dts/rtl8393_d-link_dgs-1210-52.dts
@@ -83,64 +83,64 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
-
-		SWITCH_PORT(48, 49, qsgmii)
-		SWITCH_PORT(49, 50, qsgmii)
-		SWITCH_PORT(50, 51, qsgmii)
-		SWITCH_PORT(51, 52, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
+
+		SWITCH_PORT_SDS(48, 49, 12, qsgmii)
+		SWITCH_PORT_SDS(49, 50, 12, qsgmii)
+		SWITCH_PORT_SDS(50, 51, 12, qsgmii)
+		SWITCH_PORT_SDS(51, 52, 12, qsgmii)
 
 		/* CPU-Port */
 		port@52 {
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
index 3d6ae78840d..43504d7f7ca 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g-poe.dts
@@ -99,10 +99,10 @@
 
 &switch0 {
 	ports {
-		SWITCH_PORT(48, 49, qsgmii)
-		SWITCH_PORT(49, 50, qsgmii)
-		SWITCH_PORT(50, 51, qsgmii)
-		SWITCH_PORT(51, 52, qsgmii)
+		SWITCH_PORT_SDS(48, 49, 12, qsgmii)
+		SWITCH_PORT_SDS(49, 50, 12, qsgmii)
+		SWITCH_PORT_SDS(50, 51, 12, qsgmii)
+		SWITCH_PORT_SDS(51, 52, 12, qsgmii)
 	};
 };
 
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
index a59c683fecd..fd2363145f4 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920-48g.dts
@@ -90,9 +90,9 @@
 
 &switch0 {
 	ports {
-		SWITCH_PORT(48, 50, qsgmii)
-		SWITCH_PORT(49, 52, qsgmii)
-		SWITCH_PORT(50, 49, qsgmii)
-		SWITCH_PORT(51, 51, qsgmii)
+		SWITCH_PORT_SDS(48, 50, 12, qsgmii)
+		SWITCH_PORT_SDS(49, 52, 12, qsgmii)
+		SWITCH_PORT_SDS(50, 49, 12, qsgmii)
+		SWITCH_PORT_SDS(51, 51, 12, qsgmii)
 	};
 };
diff --git a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
index 065b87f68da..1277c2ce582 100644
--- a/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
+++ b/target/linux/realtek/dts/rtl8393_hpe_1920.dtsi
@@ -85,59 +85,59 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
 
 		port@52 {
 			ethernet = <&ethernet0>;
diff --git a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
index cde143264d8..7a27bec20b7 100644
--- a/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
+++ b/target/linux/realtek/dts/rtl8393_netgear_gs750e.dts
@@ -165,10 +165,6 @@
 	EXTERNAL_PHY(45)
 	EXTERNAL_PHY(46)
 	EXTERNAL_PHY(47)
-
-	/* RTL8393 Internal SerDes */
-	INTERNAL_PHY(48)
-	INTERNAL_PHY(49)
 };
 
 &switch0 {
@@ -176,63 +172,76 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
-
-		/* TODO: fixed link SFP is not right */
-		SWITCH_SFP_PORT(48, 49, sgmii)
-		SWITCH_SFP_PORT(49, 50, sgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
+
+		port@48 {
+			reg = <48>;
+			label = "lan49";
+			pcs-handle = <&serdes12>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			/* i2c and gpio not yet identified */
+		};
+		port@49 {
+			reg = <49>;
+			label = "lan50";
+			pcs-handle = <&serdes13>;
+			phy-mode = "1000base-x";
+			managed = "in-band-status";
+			/* i2c and gpio not yet identified */
+		};
 
 		/* CPU-Port */
 		port@52 {
diff --git a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
index c7e23e9c965..972c39b50c0 100644
--- a/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
+++ b/target/linux/realtek/dts/rtl8393_panasonic_m48eg-pn28480k.dts
@@ -304,59 +304,59 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
 
 		port@52 {
 			ethernet = <&ethernet0>;
diff --git a/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts b/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
index 2941a8b5a7b..385cb3cf5d5 100644
--- a/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
+++ b/target/linux/realtek/dts/rtl8393_tplink_sg2452p-v4.dts
@@ -350,59 +350,59 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
 
 		/* CPU-Port */
 		port@52 {
diff --git a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48-a1.dts b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48-a1.dts
index 519be703cf2..d492c8ecb9f 100644
--- a/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48-a1.dts
+++ b/target/linux/realtek/dts/rtl8393_zyxel_gs1900-48-a1.dts
@@ -204,10 +204,6 @@
 	EXTERNAL_PHY(45)
 	EXTERNAL_PHY(46)
 	EXTERNAL_PHY(47)
-
-	/* RTL8393 Internal SerDes */
-	INTERNAL_PHY(48)
-	INTERNAL_PHY(49)
 };
 
 &switch0 {
@@ -215,59 +211,59 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		SWITCH_PORT(0, 1, qsgmii)
-		SWITCH_PORT(1, 2, qsgmii)
-		SWITCH_PORT(2, 3, qsgmii)
-		SWITCH_PORT(3, 4, qsgmii)
-		SWITCH_PORT(4, 5, qsgmii)
-		SWITCH_PORT(5, 6, qsgmii)
-		SWITCH_PORT(6, 7, qsgmii)
-		SWITCH_PORT(7, 8, qsgmii)
-
-		SWITCH_PORT(8, 9, qsgmii)
-		SWITCH_PORT(9, 10, qsgmii)
-		SWITCH_PORT(10, 11, qsgmii)
-		SWITCH_PORT(11, 12, qsgmii)
-		SWITCH_PORT(12, 13, qsgmii)
-		SWITCH_PORT(13, 14, qsgmii)
-		SWITCH_PORT(14, 15, qsgmii)
-		SWITCH_PORT(15, 16, qsgmii)
-
-		SWITCH_PORT(16, 17, qsgmii)
-		SWITCH_PORT(17, 18, qsgmii)
-		SWITCH_PORT(18, 19, qsgmii)
-		SWITCH_PORT(19, 20, qsgmii)
-		SWITCH_PORT(20, 21, qsgmii)
-		SWITCH_PORT(21, 22, qsgmii)
-		SWITCH_PORT(22, 23, qsgmii)
-		SWITCH_PORT(23, 24, qsgmii)
-
-		SWITCH_PORT(24, 25, qsgmii)
-		SWITCH_PORT(25, 26, qsgmii)
-		SWITCH_PORT(26, 27, qsgmii)
-		SWITCH_PORT(27, 28, qsgmii)
-		SWITCH_PORT(28, 29, qsgmii)
-		SWITCH_PORT(29, 30, qsgmii)
-		SWITCH_PORT(30, 31, qsgmii)
-		SWITCH_PORT(31, 32, qsgmii)
-
-		SWITCH_PORT(32, 33, qsgmii)
-		SWITCH_PORT(33, 34, qsgmii)
-		SWITCH_PORT(34, 35, qsgmii)
-		SWITCH_PORT(35, 36, qsgmii)
-		SWITCH_PORT(36, 37, qsgmii)
-		SWITCH_PORT(37, 38, qsgmii)
-		SWITCH_PORT(38, 39, qsgmii)
-		SWITCH_PORT(39, 40, qsgmii)
-
-		SWITCH_PORT(40, 41, qsgmii)
-		SWITCH_PORT(41, 42, qsgmii)
-		SWITCH_PORT(42, 43, qsgmii)
-		SWITCH_PORT(43, 44, qsgmii)
-		SWITCH_PORT(44, 45, qsgmii)
-		SWITCH_PORT(45, 46, qsgmii)
-		SWITCH_PORT(46, 47, qsgmii)
-		SWITCH_PORT(47, 48, qsgmii)
+		SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+		SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+		SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+		SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+		SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+		SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+		SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+		SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+		SWITCH_PORT_SDS(8, 9, 2, qsgmii)
+		SWITCH_PORT_SDS(9, 10, 2, qsgmii)
+		SWITCH_PORT_SDS(10, 11, 2, qsgmii)
+		SWITCH_PORT_SDS(11, 12, 2, qsgmii)
+		SWITCH_PORT_SDS(12, 13, 3, qsgmii)
+		SWITCH_PORT_SDS(13, 14, 3, qsgmii)
+		SWITCH_PORT_SDS(14, 15, 3, qsgmii)
+		SWITCH_PORT_SDS(15, 16, 3, qsgmii)
+
+		SWITCH_PORT_SDS(16, 17, 4, qsgmii)
+		SWITCH_PORT_SDS(17, 18, 4, qsgmii)
+		SWITCH_PORT_SDS(18, 19, 4, qsgmii)
+		SWITCH_PORT_SDS(19, 20, 4, qsgmii)
+		SWITCH_PORT_SDS(20, 21, 5, qsgmii)
+		SWITCH_PORT_SDS(21, 22, 5, qsgmii)
+		SWITCH_PORT_SDS(22, 23, 5, qsgmii)
+		SWITCH_PORT_SDS(23, 24, 5, qsgmii)
+
+		SWITCH_PORT_SDS(24, 25, 6, qsgmii)
+		SWITCH_PORT_SDS(25, 26, 6, qsgmii)
+		SWITCH_PORT_SDS(26, 27, 6, qsgmii)
+		SWITCH_PORT_SDS(27, 28, 6, qsgmii)
+		SWITCH_PORT_SDS(28, 29, 7, qsgmii)
+		SWITCH_PORT_SDS(29, 30, 7, qsgmii)
+		SWITCH_PORT_SDS(30, 31, 7, qsgmii)
+		SWITCH_PORT_SDS(31, 32, 7, qsgmii)
+
+		SWITCH_PORT_SDS(32, 33, 8, qsgmii)
+		SWITCH_PORT_SDS(33, 34, 8, qsgmii)
+		SWITCH_PORT_SDS(34, 35, 8, qsgmii)
+		SWITCH_PORT_SDS(35, 36, 8, qsgmii)
+		SWITCH_PORT_SDS(36, 37, 9, qsgmii)
+		SWITCH_PORT_SDS(37, 38, 9, qsgmii)
+		SWITCH_PORT_SDS(38, 39, 9, qsgmii)
+		SWITCH_PORT_SDS(39, 40, 9, qsgmii)
+
+		SWITCH_PORT_SDS(40, 41, 10, qsgmii)
+		SWITCH_PORT_SDS(41, 42, 10, qsgmii)
+		SWITCH_PORT_SDS(42, 43, 10, qsgmii)
+		SWITCH_PORT_SDS(43, 44, 10, qsgmii)
+		SWITCH_PORT_SDS(44, 45, 11, qsgmii)
+		SWITCH_PORT_SDS(45, 46, 11, qsgmii)
+		SWITCH_PORT_SDS(46, 47, 11, qsgmii)
+		SWITCH_PORT_SDS(47, 48, 11, qsgmii)
 
 		/* SFP cages */
 		port@48 {
@@ -275,7 +271,6 @@
 			label = "lan49";
 			pcs-handle = <&serdes12>;
 			phy-mode = "1000base-x";
-			phy-handle = <&phy48>;
 			managed = "in-band-status";
 			sfp = <&sfp0>;
 		};
@@ -285,7 +280,6 @@
 			label = "lan50";
 			pcs-handle = <&serdes13>;
 			phy-mode = "1000base-x";
-			phy-handle = <&phy49>;
 			managed = "in-band-status";
 			sfp = <&sfp1>;
 		};
diff --git a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
index c02df17fb78..da7a16d5d7e 100644
--- a/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/pcs/pcs-rtl-otto.c
@@ -836,7 +836,6 @@ static void rtpcs_839x_sds_init(struct rtpcs_serdes *sds)
 	rtpcs_sds_write_bits(sds, 0xa, 0x13, 8, 5, 0x0008);
 }
 
-__maybe_unused
 static int rtpcs_839x_init_serdes_common(struct rtpcs_ctrl *ctrl)
 {
 	for (int sds_id = 0; sds_id < ctrl->cfg->serdes_count; sds_id++)
@@ -848,7 +847,6 @@ static int rtpcs_839x_init_serdes_common(struct rtpcs_ctrl *ctrl)
 	return 0;
 }
 
-__maybe_unused
 static int rtpcs_839x_setup_serdes(struct rtpcs_serdes *sds,
 				   phy_interface_t if_mode)
 {
@@ -3687,6 +3685,8 @@ static const struct rtpcs_config rtpcs_839x_cfg = {
 	.mac_tx_pause_sts	= RTPCS_839X_MAC_TX_PAUSE_STS,
 	.serdes_count		= RTPCS_839X_SERDES_CNT,
 	.pcs_ops		= &rtpcs_839x_pcs_ops,
+	.init_serdes_common	= rtpcs_839x_init_serdes_common,
+	.setup_serdes		= rtpcs_839x_setup_serdes,
 };
 
 static const struct phylink_pcs_ops rtpcs_930x_pcs_ops = {