From: Carl Love <carll@us.ibm.com>
Date: Thu, 21 Jun 2018 22:27:40 +0000 (-0500)
Subject: PPC64, add support for the xvnegsp instruction. Add test case for the instruction.
X-Git-Tag: VALGRIND_3_14_0~93
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9c5d762904862db0d90fb0142ac1b12d5647f607;p=thirdparty%2Fvalgrind.git

PPC64, add support for the xvnegsp instruction. Add test case for the instruction.

https://bugs.kde.org/show_bug.cgi?id=395709

Signed-off-by: Carl Love <carll@us.ibm.com>
---

diff --git a/NEWS b/NEWS
index a04907af35..0f150563f2 100644
--- a/NEWS
+++ b/NEWS
@@ -113,6 +113,7 @@ where XXXXXX is the bug number as listed below.
 393023  callgrind_control risks using the wrong vgdb
 393062  build-id ELF phdrs read causes "debuginfo reader: ensure_valid failed"
 393099  posix_memalign() invalid write if alignment == 0
+395709  PPC64 is missing support for the xvnegsp instruction
 
 n-i-bz  Fix missing workq_ops operations (macOS)
 n-i-bz  fix bug in strspn replacement
diff --git a/VEX/priv/guest_ppc_toIR.c b/VEX/priv/guest_ppc_toIR.c
index 7fd7780bbf..cb1cae176a 100644
--- a/VEX/priv/guest_ppc_toIR.c
+++ b/VEX/priv/guest_ppc_toIR.c
@@ -17870,6 +17870,35 @@ dis_vxv_misc ( UInt theInstr, UInt opc2 )
          }
          break;
       }
+      case 0x372: // xvnegsp (VSX Vector Negate Single-Precision)
+      {
+         IRTemp B0 = newTemp(Ity_I32);
+         IRTemp B1 = newTemp(Ity_I32);
+         IRTemp B2 = newTemp(Ity_I32);
+         IRTemp B3 = newTemp(Ity_I32);
+
+         DIP("xvnegsp v%d,v%d\n",  XT, XB);
+
+	 /* Don't support NegF32, so just XOR the sign bit in the int value */
+         assign(B0, unop( Iop_64HIto32,
+			  unop( Iop_V128HIto64, getVSReg( XB ) ) ) );
+         assign(B1, unop( Iop_64to32,
+			  unop( Iop_V128HIto64, getVSReg( XB ) ) ) );
+         assign(B2, unop( Iop_64HIto32,
+			  unop( Iop_V128to64, getVSReg( XB ) ) ) );
+         assign(B3, unop( Iop_64to32,
+			  unop( Iop_V128to64, getVSReg( XB ) ) ) );
+
+         putVSReg( XT,
+		   binop( Iop_64HLtoV128,
+			  binop( Iop_32HLto64,
+				 binop( Iop_Xor32, mkexpr( B0 ), mkU32( 0x80000000 ) ),
+				 binop( Iop_Xor32, mkexpr( B1 ), mkU32( 0x80000000 ) ) ),
+			  binop( Iop_32HLto64,
+				 binop( Iop_Xor32, mkexpr( B2 ), mkU32( 0x80000000 ) ),
+				 binop( Iop_Xor32, mkexpr( B3 ), mkU32( 0x80000000 ) ) ) ) );
+         break;
+      }
       case 0x3F2: // xvnegdp (VSX Vector Negate Double-Precision)
       {
          IRTemp frB = newTemp(Ity_F64);
@@ -28418,6 +28447,7 @@ DisResult disInstr_PPC_WRK (
          case 0x134:  // xvresp
          case 0x1B4:  // xvredp
          case 0x194: case 0x114: // xvrsqrtedp, xvrsqrtesp
+         case 0x372:             // xvnegsp
          case 0x380: case 0x3A0: // xvmaxdp, xvmindp
          case 0x300: case 0x320: // xvmaxsp, xvminsp
          case 0x3C0: case 0x340: // xvcpsgndp, xvcpsgnsp
diff --git a/none/tests/ppc32/test_isa_2_06_part3.c b/none/tests/ppc32/test_isa_2_06_part3.c
index 5ebc1a5e7f..9f80da2841 100644
--- a/none/tests/ppc32/test_isa_2_06_part3.c
+++ b/none/tests/ppc32/test_isa_2_06_part3.c
@@ -765,6 +765,11 @@ static void test_xvnegdp(void)
    __asm__ __volatile__ ("xvnegdp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
 }
 
+static void test_xvnegsp(void)
+{
+   __asm__ __volatile__ ("xvnegsp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
+}
+
 static void test_xvabssp(void)
 {
    __asm__ __volatile__ ("xvabssp   %x0, %x1" : "=wa" (vec_out): "wa" (vec_inB));
@@ -850,6 +855,7 @@ vsx_one_fp_arg_tests[] = {
                                 { &test_xsrdpi, "xsrdpi", NULL, 20, DOUBLE_TEST, VX_CONV_TO_DOUBLE, "round"},
                                 { &test_xvabsdp, "xvabsdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "abs"},
                                 { &test_xvnabsdp, "xvnabsdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "nabs"},
+                                { &test_xvnegsp, "xvnegsp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "neg"},
                                 { &test_xvnegdp, "xvnegdp", NULL, 20, DOUBLE_TEST, VX_DEFAULT, "neg"},
                                 { &test_xvabssp, "xvabssp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "abs"},
                                 { &test_xvnabssp, "xvnabssp", NULL, 20, SINGLE_TEST, VX_DEFAULT, "nabs"},
diff --git a/none/tests/ppc64/test_isa_2_06_part3.stdout.exp b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
index 1658a6eb4e..e976074339 100644
--- a/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
+++ b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
@@ -310,6 +310,12 @@ Test VSX vector and scalar single argument instructions
 #8: xvnabsdp nabs(41382511a2000000) = c1382511a2000000; nabs(40312ef5a9300000) = c0312ef5a9300000
 #9: xvnabsdp nabs(40514bf5d2300000) = c0514bf5d2300000; nabs(40976bf982440000) = c0976bf982440000
 
+#0: xvnegsp neg(3ec00000) = bec00000; neg(42780000) = c2780000; neg(00000000) = 80000000; neg(7f800000) = ff800000
+#1: xvnegsp neg(00000000) = 80000000; neg(00000000) = 80000000; neg(80000000) = 00000000; neg(7f800000) = ff800000
+#2: xvnegsp neg(ff800000) = 7f800000; neg(7fbfffff) = ffbfffff; neg(ffbfffff) = 7fbfffff; neg(7fc00000) = ffc00000
+#3: xvnegsp neg(ffc00000) = 7fc00000; neg(80000000) = 00000000; neg(c683287b) = 4683287b; neg(49192c2d) = c9192c2d
+#4: xvnegsp neg(49c1288d) = c9c1288d; neg(418977ad) = c18977ad; neg(428a5faf) = c28a5faf; neg(44bb5fcc) = c4bb5fcc
+
 #0: xvnegdp neg(3fd8000000000000) = bfd8000000000000; neg(404f000000000000) = c04f000000000000
 #1: xvnegdp neg(0018000000b77501) = 8018000000b77501; neg(7fe800000000051b) = ffe800000000051b
 #2: xvnegdp neg(0123214569900000) = 8123214569900000; neg(0000000000000000) = 8000000000000000