From: Greg Kroah-Hartman Date: Sun, 22 Feb 2026 05:34:45 +0000 (+0100) Subject: drop broken 6.18 patches X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9de1cdb9201679cae2f95ca05274e870628c0d0d;p=thirdparty%2Fkernel%2Fstable-queue.git drop broken 6.18 patches --- diff --git a/queue-6.18/gpu-nova-core-apply-the-one-use-item-per-line-policy.patch b/queue-6.18/gpu-nova-core-apply-the-one-use-item-per-line-policy.patch deleted file mode 100644 index 172af5dba2..0000000000 --- a/queue-6.18/gpu-nova-core-apply-the-one-use-item-per-line-policy.patch +++ /dev/null @@ -1,803 +0,0 @@ -From 0b3d2d6050ac768e98f72b9c78fd453bd0638345 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Thu, 6 Nov 2025 18:10:06 -0800 -Subject: gpu: nova-core: apply the one "use" item per line policy - -From: John Hubbard - -[ Upstream commit 173c99b85aa05387fcfb3231293124c5d611d167 ] - -As per [1], we need one "use" item per line, in order to reduce merge -conflicts. Furthermore, we need a trailing ", //" in order to tell -rustfmt(1) to leave it alone. - -This does that for the entire nova-core driver. - -[1] https://docs.kernel.org/rust/coding-guidelines.html#imports - -Acked-by: Danilo Krummrich -Signed-off-by: John Hubbard -[acourbot@nvidia.com: remove imports already in prelude as pointed out -by Danilo.] -[acourbot@nvidia.com: remove a few unneeded trailing `//`.] -Signed-off-by: Alexandre Courbot -Message-ID: <20251107021006.434109-1-jhubbard@nvidia.com> -Stable-dep-of: 5cf76277cdec ("gpu: nova-core: check for overflow to DMATRFBASE1") -Signed-off-by: Sasha Levin ---- - drivers/gpu/nova-core/dma.rs | 17 +++++--- - drivers/gpu/nova-core/driver.rs | 11 +++-- - drivers/gpu/nova-core/falcon.rs | 34 +++++++++------ - drivers/gpu/nova-core/falcon/gsp.rs | 12 +++++- - drivers/gpu/nova-core/falcon/hal.rs | 12 ++++-- - drivers/gpu/nova-core/falcon/hal/ga102.rs | 26 ++++++++---- - drivers/gpu/nova-core/falcon/sec2.rs | 10 ++++- - drivers/gpu/nova-core/fb.rs | 27 +++++++----- - drivers/gpu/nova-core/fb/hal.rs | 6 ++- - drivers/gpu/nova-core/fb/hal/ga100.rs | 12 +++--- - drivers/gpu/nova-core/fb/hal/ga102.rs | 8 ++-- - drivers/gpu/nova-core/fb/hal/tu102.rs | 9 ++-- - drivers/gpu/nova-core/firmware.rs | 23 +++++----- - drivers/gpu/nova-core/firmware/booter.rs | 45 ++++++++++++++------ - drivers/gpu/nova-core/firmware/fwsec.rs | 52 +++++++++++++++++------ - drivers/gpu/nova-core/firmware/gsp.rs | 33 +++++++++----- - drivers/gpu/nova-core/firmware/riscv.rs | 16 ++++--- - drivers/gpu/nova-core/gfw.rs | 14 +++--- - drivers/gpu/nova-core/gpu.rs | 29 +++++++++---- - drivers/gpu/nova-core/gsp/boot.rs | 44 ++++++++++++------- - drivers/gpu/nova-core/regs.rs | 24 ++++++++--- - drivers/gpu/nova-core/vbios.rs | 28 ++++++++---- - 22 files changed, 335 insertions(+), 157 deletions(-) - -diff --git a/drivers/gpu/nova-core/dma.rs b/drivers/gpu/nova-core/dma.rs -index 94f44bcfd748d..5b117aefdb15f 100644 ---- a/drivers/gpu/nova-core/dma.rs -+++ b/drivers/gpu/nova-core/dma.rs -@@ -2,12 +2,17 @@ - - //! Simple DMA object wrapper. - --use core::ops::{Deref, DerefMut}; -- --use kernel::device; --use kernel::dma::CoherentAllocation; --use kernel::page::PAGE_SIZE; --use kernel::prelude::*; -+use core::ops::{ -+ Deref, -+ DerefMut, // -+}; -+ -+use kernel::{ -+ device, -+ dma::CoherentAllocation, -+ page::PAGE_SIZE, -+ prelude::*, // -+}; - - pub(crate) struct DmaObject { - dma: CoherentAllocation, -diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver.rs -index edc72052e27ae..2509f75eccb99 100644 ---- a/drivers/gpu/nova-core/driver.rs -+++ b/drivers/gpu/nova-core/driver.rs -@@ -1,13 +1,18 @@ - // SPDX-License-Identifier: GPL-2.0 - - use kernel::{ -- auxiliary, c_str, -+ auxiliary, -+ c_str, - device::Core, - pci, -- pci::{Class, ClassMask, Vendor}, -+ pci::{ -+ Class, -+ ClassMask, -+ Vendor, // -+ }, - prelude::*, - sizes::SZ_16M, -- sync::Arc, -+ sync::Arc, // - }; - - use crate::gpu::Gpu; -diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs -index 05856b43b51c3..3fa2c9cfa2d7f 100644 ---- a/drivers/gpu/nova-core/falcon.rs -+++ b/drivers/gpu/nova-core/falcon.rs -@@ -3,20 +3,28 @@ - //! Falcon microprocessor base support - - use core::ops::Deref; -+ - use hal::FalconHal; --use kernel::device; --use kernel::dma::DmaAddress; --use kernel::io::poll::read_poll_timeout; --use kernel::prelude::*; --use kernel::sync::aref::ARef; --use kernel::time::delay::fsleep; --use kernel::time::Delta; -- --use crate::dma::DmaObject; --use crate::driver::Bar0; --use crate::gpu::Chipset; --use crate::regs; --use crate::regs::macros::RegisterBase; -+ -+use kernel::{ -+ device, -+ dma::DmaAddress, -+ io::poll::read_poll_timeout, -+ prelude::*, -+ sync::aref::ARef, -+ time::{ -+ delay::fsleep, -+ Delta, // -+ }, -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ driver::Bar0, -+ gpu::Chipset, -+ regs, -+ regs::macros::RegisterBase, // -+}; - - pub(crate) mod gsp; - mod hal; -diff --git a/drivers/gpu/nova-core/falcon/gsp.rs b/drivers/gpu/nova-core/falcon/gsp.rs -index f17599cb49fa1..93d4eca65631e 100644 ---- a/drivers/gpu/nova-core/falcon/gsp.rs -+++ b/drivers/gpu/nova-core/falcon/gsp.rs -@@ -2,8 +2,16 @@ - - use crate::{ - driver::Bar0, -- falcon::{Falcon, FalconEngine, PFalcon2Base, PFalconBase}, -- regs::{self, macros::RegisterBase}, -+ falcon::{ -+ Falcon, -+ FalconEngine, -+ PFalcon2Base, -+ PFalconBase, // -+ }, -+ regs::{ -+ self, -+ macros::RegisterBase, // -+ }, - }; - - /// Type specifying the `Gsp` falcon engine. Cannot be instantiated. -diff --git a/drivers/gpu/nova-core/falcon/hal.rs b/drivers/gpu/nova-core/falcon/hal.rs -index bba2884556179..cde268e7411d9 100644 ---- a/drivers/gpu/nova-core/falcon/hal.rs -+++ b/drivers/gpu/nova-core/falcon/hal.rs -@@ -2,9 +2,15 @@ - - use kernel::prelude::*; - --use crate::driver::Bar0; --use crate::falcon::{Falcon, FalconBromParams, FalconEngine}; --use crate::gpu::Chipset; -+use crate::{ -+ driver::Bar0, -+ falcon::{ -+ Falcon, -+ FalconBromParams, -+ FalconEngine, // -+ }, -+ gpu::Chipset, -+}; - - mod ga102; - -diff --git a/drivers/gpu/nova-core/falcon/hal/ga102.rs b/drivers/gpu/nova-core/falcon/hal/ga102.rs -index afed353b24d29..69a7a95cac163 100644 ---- a/drivers/gpu/nova-core/falcon/hal/ga102.rs -+++ b/drivers/gpu/nova-core/falcon/hal/ga102.rs -@@ -2,16 +2,24 @@ - - use core::marker::PhantomData; - --use kernel::device; --use kernel::io::poll::read_poll_timeout; --use kernel::prelude::*; --use kernel::time::Delta; -- --use crate::driver::Bar0; --use crate::falcon::{ -- Falcon, FalconBromParams, FalconEngine, FalconModSelAlgo, PeregrineCoreSelect, -+use kernel::{ -+ device, -+ io::poll::read_poll_timeout, -+ prelude::*, -+ time::Delta, // -+}; -+ -+use crate::{ -+ driver::Bar0, -+ falcon::{ -+ Falcon, -+ FalconBromParams, -+ FalconEngine, -+ FalconModSelAlgo, -+ PeregrineCoreSelect, // -+ }, -+ regs, - }; --use crate::regs; - - use super::FalconHal; - -diff --git a/drivers/gpu/nova-core/falcon/sec2.rs b/drivers/gpu/nova-core/falcon/sec2.rs -index 815786c8480db..b57d362e576a4 100644 ---- a/drivers/gpu/nova-core/falcon/sec2.rs -+++ b/drivers/gpu/nova-core/falcon/sec2.rs -@@ -1,7 +1,13 @@ - // SPDX-License-Identifier: GPL-2.0 - --use crate::falcon::{FalconEngine, PFalcon2Base, PFalconBase}; --use crate::regs::macros::RegisterBase; -+use crate::{ -+ falcon::{ -+ FalconEngine, -+ PFalcon2Base, -+ PFalconBase, // -+ }, -+ regs::macros::RegisterBase, -+}; - - /// Type specifying the `Sec2` falcon engine. Cannot be instantiated. - pub(crate) struct Sec2(()); -diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs -index 27d9edab8347c..989bbfd5bdeef 100644 ---- a/drivers/gpu/nova-core/fb.rs -+++ b/drivers/gpu/nova-core/fb.rs -@@ -2,16 +2,23 @@ - - use core::ops::Range; - --use kernel::prelude::*; --use kernel::ptr::{Alignable, Alignment}; --use kernel::sizes::*; --use kernel::sync::aref::ARef; --use kernel::{dev_warn, device}; -- --use crate::dma::DmaObject; --use crate::driver::Bar0; --use crate::gpu::Chipset; --use crate::regs; -+use kernel::{ -+ device, -+ prelude::*, -+ ptr::{ -+ Alignable, -+ Alignment, // -+ }, -+ sizes::*, -+ sync::aref::ARef, // -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ driver::Bar0, -+ gpu::Chipset, -+ regs, // -+}; - - mod hal; - -diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal.rs -index 2f914948bb9a9..aba0abd8ee005 100644 ---- a/drivers/gpu/nova-core/fb/hal.rs -+++ b/drivers/gpu/nova-core/fb/hal.rs -@@ -2,8 +2,10 @@ - - use kernel::prelude::*; - --use crate::driver::Bar0; --use crate::gpu::Chipset; -+use crate::{ -+ driver::Bar0, -+ gpu::Chipset, // -+}; - - mod ga100; - mod ga102; -diff --git a/drivers/gpu/nova-core/fb/hal/ga100.rs b/drivers/gpu/nova-core/fb/hal/ga100.rs -index 871c42bf033ac..dae392c38a1b5 100644 ---- a/drivers/gpu/nova-core/fb/hal/ga100.rs -+++ b/drivers/gpu/nova-core/fb/hal/ga100.rs -@@ -1,15 +1,17 @@ - // SPDX-License-Identifier: GPL-2.0 - --struct Ga100; -- - use kernel::prelude::*; - --use crate::driver::Bar0; --use crate::fb::hal::FbHal; --use crate::regs; -+use crate::{ -+ driver::Bar0, -+ fb::hal::FbHal, -+ regs, // -+}; - - use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT; - -+struct Ga100; -+ - pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 { - u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT - | u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40()) -diff --git a/drivers/gpu/nova-core/fb/hal/ga102.rs b/drivers/gpu/nova-core/fb/hal/ga102.rs -index a73b77e397151..734605905031b 100644 ---- a/drivers/gpu/nova-core/fb/hal/ga102.rs -+++ b/drivers/gpu/nova-core/fb/hal/ga102.rs -@@ -2,9 +2,11 @@ - - use kernel::prelude::*; - --use crate::driver::Bar0; --use crate::fb::hal::FbHal; --use crate::regs; -+use crate::{ -+ driver::Bar0, -+ fb::hal::FbHal, -+ regs, // -+}; - - fn vidmem_size_ga102(bar: &Bar0) -> u64 { - regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size() -diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/fb/hal/tu102.rs -index b022c781caf45..2faf95f0e1ad8 100644 ---- a/drivers/gpu/nova-core/fb/hal/tu102.rs -+++ b/drivers/gpu/nova-core/fb/hal/tu102.rs -@@ -1,10 +1,13 @@ - // SPDX-License-Identifier: GPL-2.0 - --use crate::driver::Bar0; --use crate::fb::hal::FbHal; --use crate::regs; - use kernel::prelude::*; - -+use crate::{ -+ driver::Bar0, -+ fb::hal::FbHal, -+ regs, // -+}; -+ - /// Shift applied to the sysmem address before it is written into `NV_PFB_NISO_FLUSH_SYSMEM_ADDR`, - /// to be used by HALs. - pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8; -diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firmware.rs -index 4179a74a23421..163b746f03ef3 100644 ---- a/drivers/gpu/nova-core/firmware.rs -+++ b/drivers/gpu/nova-core/firmware.rs -@@ -4,17 +4,20 @@ - //! to be loaded into a given execution unit. - - use core::marker::PhantomData; --use core::mem::size_of; - --use kernel::device; --use kernel::firmware; --use kernel::prelude::*; --use kernel::str::CString; --use kernel::transmute::FromBytes; -- --use crate::dma::DmaObject; --use crate::falcon::FalconFirmware; --use crate::gpu; -+use kernel::{ -+ device, -+ firmware, -+ prelude::*, -+ str::CString, -+ transmute::FromBytes, // -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ falcon::FalconFirmware, -+ gpu, // -+}; - - pub(crate) mod booter; - pub(crate) mod fwsec; -diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-core/firmware/booter.rs -index b4ff1b17e4a08..1e8f6c99fa2e1 100644 ---- a/drivers/gpu/nova-core/firmware/booter.rs -+++ b/drivers/gpu/nova-core/firmware/booter.rs -@@ -4,20 +4,37 @@ - //! running on [`Sec2`], that is used on Turing/Ampere to load the GSP firmware into the GSP falcon - //! (and optionally unload it through a separate firmware image). - --use core::marker::PhantomData; --use core::mem::size_of; --use core::ops::Deref; -- --use kernel::device; --use kernel::prelude::*; --use kernel::transmute::FromBytes; -- --use crate::dma::DmaObject; --use crate::driver::Bar0; --use crate::falcon::sec2::Sec2; --use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget}; --use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned}; --use crate::gpu::Chipset; -+use core::{ -+ marker::PhantomData, -+ ops::Deref, // -+}; -+ -+use kernel::{ -+ device, -+ prelude::*, -+ transmute::FromBytes, // -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ driver::Bar0, -+ falcon::{ -+ sec2::Sec2, -+ Falcon, -+ FalconBromParams, -+ FalconFirmware, -+ FalconLoadParams, -+ FalconLoadTarget, // -+ }, -+ firmware::{ -+ BinFirmware, -+ FirmwareDmaObject, -+ FirmwareSignature, -+ Signed, -+ Unsigned, // -+ }, -+ gpu::Chipset, -+}; - - /// Local convenience function to return a copy of `S` by reinterpreting the bytes starting at - /// `offset` in `slice`. -diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs -index dd3420aaa2bf2..1e4dde0279d7f 100644 ---- a/drivers/gpu/nova-core/firmware/fwsec.rs -+++ b/drivers/gpu/nova-core/firmware/fwsec.rs -@@ -10,20 +10,44 @@ - //! - The command to be run, as this firmware can perform several tasks ; - //! - The ucode signature, so the GSP falcon can run FWSEC in HS mode. - --use core::marker::PhantomData; --use core::mem::{align_of, size_of}; --use core::ops::Deref; -- --use kernel::device::{self, Device}; --use kernel::prelude::*; --use kernel::transmute::FromBytes; -- --use crate::dma::DmaObject; --use crate::driver::Bar0; --use crate::falcon::gsp::Gsp; --use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget}; --use crate::firmware::{FalconUCodeDescV3, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned}; --use crate::vbios::Vbios; -+use core::{ -+ marker::PhantomData, -+ mem::{ -+ align_of, -+ size_of, // -+ }, -+ ops::Deref, -+}; -+ -+use kernel::{ -+ device::{ -+ self, -+ Device, // -+ }, -+ prelude::*, -+ transmute::FromBytes, -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ driver::Bar0, -+ falcon::{ -+ gsp::Gsp, -+ Falcon, -+ FalconBromParams, -+ FalconFirmware, -+ FalconLoadParams, -+ FalconLoadTarget, // -+ }, -+ firmware::{ -+ FalconUCodeDescV3, -+ FirmwareDmaObject, -+ FirmwareSignature, -+ Signed, -+ Unsigned, // -+ }, -+ vbios::Vbios, -+}; - - const NVFW_FALCON_APPIF_ID_DMEMMAPPER: u32 = 0x4; - -diff --git a/drivers/gpu/nova-core/firmware/gsp.rs b/drivers/gpu/nova-core/firmware/gsp.rs -index 6b0761460a57d..f0f4756c315cd 100644 ---- a/drivers/gpu/nova-core/firmware/gsp.rs -+++ b/drivers/gpu/nova-core/firmware/gsp.rs -@@ -2,16 +2,29 @@ - - use core::mem::size_of_val; - --use kernel::device; --use kernel::dma::{DataDirection, DmaAddress}; --use kernel::kvec; --use kernel::prelude::*; --use kernel::scatterlist::{Owned, SGTable}; -- --use crate::dma::DmaObject; --use crate::firmware::riscv::RiscvFirmware; --use crate::gpu::{Architecture, Chipset}; --use crate::gsp::GSP_PAGE_SIZE; -+use kernel::{ -+ device, -+ dma::{ -+ DataDirection, -+ DmaAddress, // -+ }, -+ kvec, -+ prelude::*, -+ scatterlist::{ -+ Owned, -+ SGTable, // -+ }, -+}; -+ -+use crate::{ -+ dma::DmaObject, -+ firmware::riscv::RiscvFirmware, -+ gpu::{ -+ Architecture, -+ Chipset, // -+ }, -+ gsp::GSP_PAGE_SIZE, -+}; - - /// Ad-hoc and temporary module to extract sections from ELF images. - /// -diff --git a/drivers/gpu/nova-core/firmware/riscv.rs b/drivers/gpu/nova-core/firmware/riscv.rs -index afb08f5bc4ba8..196dedb96aeb7 100644 ---- a/drivers/gpu/nova-core/firmware/riscv.rs -+++ b/drivers/gpu/nova-core/firmware/riscv.rs -@@ -5,13 +5,17 @@ - - use core::mem::size_of; - --use kernel::device; --use kernel::firmware::Firmware; --use kernel::prelude::*; --use kernel::transmute::FromBytes; -+use kernel::{ -+ device, -+ firmware::Firmware, -+ prelude::*, -+ transmute::FromBytes, // -+}; - --use crate::dma::DmaObject; --use crate::firmware::BinFirmware; -+use crate::{ -+ dma::DmaObject, -+ firmware::BinFirmware, // -+}; - - /// Descriptor for microcode running on a RISC-V core. - #[repr(C)] -diff --git a/drivers/gpu/nova-core/gfw.rs b/drivers/gpu/nova-core/gfw.rs -index 23c28c2a3793a..9121f400046d8 100644 ---- a/drivers/gpu/nova-core/gfw.rs -+++ b/drivers/gpu/nova-core/gfw.rs -@@ -18,12 +18,16 @@ - //! - //! Note that the devinit sequence also needs to run during suspend/resume. - --use kernel::io::poll::read_poll_timeout; --use kernel::prelude::*; --use kernel::time::Delta; -+use kernel::{ -+ io::poll::read_poll_timeout, -+ prelude::*, -+ time::Delta, // -+}; - --use crate::driver::Bar0; --use crate::regs; -+use crate::{ -+ driver::Bar0, -+ regs, // -+}; - - /// Wait for the `GFW` (GPU firmware) boot completion signal (`GFW_BOOT`), or a 4 seconds timeout. - /// -diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs -index af20e2daea24f..bcc787b887953 100644 ---- a/drivers/gpu/nova-core/gpu.rs -+++ b/drivers/gpu/nova-core/gpu.rs -@@ -1,13 +1,26 @@ - // SPDX-License-Identifier: GPL-2.0 - --use kernel::{device, devres::Devres, error::code::*, fmt, pci, prelude::*, sync::Arc}; -- --use crate::driver::Bar0; --use crate::falcon::{gsp::Gsp as GspFalcon, sec2::Sec2 as Sec2Falcon, Falcon}; --use crate::fb::SysmemFlush; --use crate::gfw; --use crate::gsp::Gsp; --use crate::regs; -+use kernel::{ -+ device, -+ devres::Devres, -+ fmt, -+ pci, -+ prelude::*, -+ sync::Arc, // -+}; -+ -+use crate::{ -+ driver::Bar0, -+ falcon::{ -+ gsp::Gsp as GspFalcon, -+ sec2::Sec2 as Sec2Falcon, -+ Falcon, // -+ }, -+ fb::SysmemFlush, -+ gfw, -+ gsp::Gsp, -+ regs, -+}; - - macro_rules! define_chipset { - ({ $($variant:ident = $value:expr),* $(,)* }) => -diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs -index 2800f3aee37d0..19dddff929da4 100644 ---- a/drivers/gpu/nova-core/gsp/boot.rs -+++ b/drivers/gpu/nova-core/gsp/boot.rs -@@ -1,21 +1,35 @@ - // SPDX-License-Identifier: GPL-2.0 - --use kernel::device; --use kernel::pci; --use kernel::prelude::*; -- --use crate::driver::Bar0; --use crate::falcon::{gsp::Gsp, sec2::Sec2, Falcon}; --use crate::fb::FbLayout; --use crate::firmware::{ -- booter::{BooterFirmware, BooterKind}, -- fwsec::{FwsecCommand, FwsecFirmware}, -- gsp::GspFirmware, -- FIRMWARE_VERSION, -+use kernel::{ -+ device, -+ pci, -+ prelude::*, // -+}; -+ -+use crate::{ -+ driver::Bar0, -+ falcon::{ -+ gsp::Gsp, -+ sec2::Sec2, -+ Falcon, // -+ }, -+ fb::FbLayout, -+ firmware::{ -+ booter::{ -+ BooterFirmware, -+ BooterKind, // -+ }, -+ fwsec::{ -+ FwsecCommand, -+ FwsecFirmware, // -+ }, -+ gsp::GspFirmware, -+ FIRMWARE_VERSION, // -+ }, -+ gpu::Chipset, -+ regs, -+ vbios::Vbios, - }; --use crate::gpu::Chipset; --use crate::regs; --use crate::vbios::Vbios; - - impl super::Gsp { - /// Helper function to load and run the FWSEC-FRTS firmware and confirm that it has properly -diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs -index 206dab2e13351..7cd2e8a4d4c6f 100644 ---- a/drivers/gpu/nova-core/regs.rs -+++ b/drivers/gpu/nova-core/regs.rs -@@ -7,13 +7,27 @@ - #[macro_use] - pub(crate) mod macros; - --use crate::falcon::{ -- DmaTrfCmdSize, FalconCoreRev, FalconCoreRevSubversion, FalconFbifMemType, FalconFbifTarget, -- FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, PFalconBase, PeregrineCoreSelect, --}; --use crate::gpu::{Architecture, Chipset}; - use kernel::prelude::*; - -+use crate::{ -+ falcon::{ -+ DmaTrfCmdSize, -+ FalconCoreRev, -+ FalconCoreRevSubversion, -+ FalconFbifMemType, -+ FalconFbifTarget, -+ FalconModSelAlgo, -+ FalconSecurityModel, -+ PFalcon2Base, -+ PFalconBase, -+ PeregrineCoreSelect, // -+ }, -+ gpu::{ -+ Architecture, -+ Chipset, // -+ }, -+}; -+ - // PMC - - register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about the GPU" { -diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs -index 0dfefad88cc6a..cc949e5ee2836 100644 ---- a/drivers/gpu/nova-core/vbios.rs -+++ b/drivers/gpu/nova-core/vbios.rs -@@ -2,16 +2,26 @@ - - //! VBIOS extraction and parsing. - --use crate::driver::Bar0; --use crate::firmware::fwsec::Bcrt30Rsa3kSignature; --use crate::firmware::FalconUCodeDescV3; - use core::convert::TryFrom; --use kernel::device; --use kernel::error::Result; --use kernel::prelude::*; --use kernel::ptr::{Alignable, Alignment}; --use kernel::transmute::FromBytes; --use kernel::types::ARef; -+ -+use kernel::{ -+ device, -+ prelude::*, -+ ptr::{ -+ Alignable, -+ Alignment, // -+ }, -+ transmute::FromBytes, -+ types::ARef, -+}; -+ -+use crate::{ -+ driver::Bar0, -+ firmware::{ -+ fwsec::Bcrt30Rsa3kSignature, -+ FalconUCodeDescV3, // -+ }, -+}; - - /// The offset of the VBIOS ROM in the BAR0 space. - const ROM_OFFSET: usize = 0x300000; --- -2.51.0 - diff --git a/queue-6.18/gpu-nova-core-check-for-overflow-to-dmatrfbase1.patch b/queue-6.18/gpu-nova-core-check-for-overflow-to-dmatrfbase1.patch deleted file mode 100644 index 91c42236bc..0000000000 --- a/queue-6.18/gpu-nova-core-check-for-overflow-to-dmatrfbase1.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 29e3db038507de6437b8ed000c8efc1116a909b8 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 7 Jan 2026 14:16:46 -0600 -Subject: gpu: nova-core: check for overflow to DMATRFBASE1 - -From: Timur Tabi - -[ Upstream commit 5cf76277cdec872aef9ff2e9008ae129bb303787 ] - -The NV_PFALCON_FALCON_DMATRFBASE/1 register pair supports DMA addresses -up to 49 bits only, but the write to DMATRFBASE1 could exceed that. -To mitigate, check first that the DMA address will fit. - -Reviewed-by: John Hubbard -Reviewed-by: Joel Fernandes -Fixes: 69f5cd67ce41 ("gpu: nova-core: add falcon register definitions and base code") -Signed-off-by: Timur Tabi -Link: https://patch.msgid.link/20260107201647.2490140-1-ttabi@nvidia.com -[ Import ::kernel::dma::DmaMask. - Danilo ] -Signed-off-by: Danilo Krummrich -Signed-off-by: Sasha Levin ---- - drivers/gpu/nova-core/falcon.rs | 11 ++++++++++- - 1 file changed, 10 insertions(+), 1 deletion(-) - -diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs -index 3fa2c9cfa2d7f..02a37a7e5ddab 100644 ---- a/drivers/gpu/nova-core/falcon.rs -+++ b/drivers/gpu/nova-core/falcon.rs -@@ -8,7 +8,10 @@ - - use kernel::{ - device, -- dma::DmaAddress, -+ dma::{ -+ DmaAddress, -+ DmaMask, // -+ }, - io::poll::read_poll_timeout, - prelude::*, - sync::aref::ARef, -@@ -470,6 +473,12 @@ fn dma_wr>( - return Err(EINVAL); - } - -+ // The DMATRFBASE/1 register pair only supports a 49-bit address. -+ if dma_start > DmaMask::new::<49>().value() { -+ dev_err!(self.dev, "DMA address {:#x} exceeds 49 bits\n", dma_start); -+ return Err(ERANGE); -+ } -+ - // DMA transfers can only be done in units of 256 bytes. Compute how many such transfers we - // need to perform. - let num_transfers = load_offsets.len.div_ceil(DMA_LEN); --- -2.51.0 - diff --git a/queue-6.18/gpu-nova-core-replace-as-with-from-conversions-where.patch b/queue-6.18/gpu-nova-core-replace-as-with-from-conversions-where.patch deleted file mode 100644 index 489ec14c89..0000000000 --- a/queue-6.18/gpu-nova-core-replace-as-with-from-conversions-where.patch +++ /dev/null @@ -1,197 +0,0 @@ -From 9fed3df8a0ba9bb291cee42438a0887538f4c608 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 29 Oct 2025 08:12:09 +0900 -Subject: gpu: nova-core: replace `as` with `from` conversions where possible - -From: Alexandre Courbot - -[ Upstream commit 9a3c2f8a4f84960a48c056d0da88de3d09e6d622 ] - -The `as` operator is best avoided as it silently drops bits if the -destination type is smaller that the source. - -For data types where this is clearly not the case, use `from` to -unambiguously signal that these conversions are lossless. - -Acked-by: Danilo Krummrich -Signed-off-by: Alexandre Courbot -Message-ID: <20251029-nova-as-v3-1-6a30c7333ad9@nvidia.com> -Stable-dep-of: 5cf76277cdec ("gpu: nova-core: check for overflow to DMATRFBASE1") -Signed-off-by: Sasha Levin ---- - drivers/gpu/nova-core/falcon/hal/ga102.rs | 6 ++-- - drivers/gpu/nova-core/firmware/fwsec.rs | 4 +-- - drivers/gpu/nova-core/vbios.rs | 42 +++++++++++------------ - 3 files changed, 25 insertions(+), 27 deletions(-) - -diff --git a/drivers/gpu/nova-core/falcon/hal/ga102.rs b/drivers/gpu/nova-core/falcon/hal/ga102.rs -index f2ae9537321d0..afed353b24d29 100644 ---- a/drivers/gpu/nova-core/falcon/hal/ga102.rs -+++ b/drivers/gpu/nova-core/falcon/hal/ga102.rs -@@ -40,11 +40,9 @@ fn signature_reg_fuse_version_ga102( - engine_id_mask: u16, - ucode_id: u8, - ) -> Result { -- const NV_FUSE_OPT_FPF_SIZE: u8 = regs::NV_FUSE_OPT_FPF_SIZE as u8; -- - // Each engine has 16 ucode version registers numbered from 1 to 16. -- let ucode_idx = match ucode_id { -- 1..=NV_FUSE_OPT_FPF_SIZE => (ucode_id - 1) as usize, -+ let ucode_idx = match usize::from(ucode_id) { -+ ucode_id @ 1..=regs::NV_FUSE_OPT_FPF_SIZE => ucode_id - 1, - _ => { - dev_err!(dev, "invalid ucode id {:#x}", ucode_id); - return Err(EINVAL); -diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-core/firmware/fwsec.rs -index 8edbb5c0572c9..dd3420aaa2bf2 100644 ---- a/drivers/gpu/nova-core/firmware/fwsec.rs -+++ b/drivers/gpu/nova-core/firmware/fwsec.rs -@@ -259,13 +259,13 @@ fn new_fwsec(dev: &Device, bios: &Vbios, cmd: FwsecCommand) -> Re - } - - // Find the DMEM mapper section in the firmware. -- for i in 0..hdr.entry_count as usize { -+ for i in 0..usize::from(hdr.entry_count) { - let app: &FalconAppifV1 = - // SAFETY: we have exclusive access to `dma_object`. - unsafe { - transmute( - &dma_object, -- hdr_offset + hdr.header_size as usize + i * hdr.entry_size as usize -+ hdr_offset + usize::from(hdr.header_size) + i * usize::from(hdr.entry_size) - ) - }?; - -diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs -index 71fbe71b84db9..42ac83365e9b3 100644 ---- a/drivers/gpu/nova-core/vbios.rs -+++ b/drivers/gpu/nova-core/vbios.rs -@@ -328,7 +328,7 @@ fn is_last(&self) -> bool { - - /// Calculate image size in bytes from 512-byte blocks. - fn image_size_bytes(&self) -> usize { -- self.image_len as usize * 512 -+ usize::from(self.image_len) * 512 - } - } - -@@ -406,13 +406,13 @@ fn from_id(image: &PciAtBiosImage, token_id: u8) -> Result { - let header = &image.bit_header; - - // Offset to the first token entry -- let tokens_start = image.bit_offset + header.header_size as usize; -+ let tokens_start = image.bit_offset + usize::from(header.header_size); - -- for i in 0..header.token_entries as usize { -- let entry_offset = tokens_start + (i * header.token_size as usize); -+ for i in 0..usize::from(header.token_entries) { -+ let entry_offset = tokens_start + (i * usize::from(header.token_size)); - - // Make sure we don't go out of bounds -- if entry_offset + header.token_size as usize > image.base.data.len() { -+ if entry_offset + usize::from(header.token_size) > image.base.data.len() { - return Err(EINVAL); - } - -@@ -568,7 +568,7 @@ fn is_last(&self) -> bool { - - /// Calculate image size in bytes from 512-byte blocks. - fn image_size_bytes(&self) -> usize { -- self.subimage_len as usize * 512 -+ usize::from(self.subimage_len) * 512 - } - - /// Try to find NPDE in the data, the NPDE is right after the PCIR. -@@ -580,8 +580,8 @@ fn find_in_data( - ) -> Option { - // Calculate the offset where NPDE might be located - // NPDE should be right after the PCIR structure, aligned to 16 bytes -- let pcir_offset = rom_header.pci_data_struct_offset as usize; -- let npde_start = (pcir_offset + pcir.pci_data_struct_len as usize + 0x0F) & !0x0F; -+ let pcir_offset = usize::from(rom_header.pci_data_struct_offset); -+ let npde_start = (pcir_offset + usize::from(pcir.pci_data_struct_len) + 0x0F) & !0x0F; - - // Check if we have enough data - if npde_start + core::mem::size_of::() > data.len() { -@@ -775,7 +775,7 @@ fn new(dev: &device::Device, data: &[u8]) -> Result { - .inspect_err(|e| dev_err!(dev, "Failed to create PciRomHeader: {:?}\n", e))?; - - // Get the PCI Data Structure using the pointer from the ROM header. -- let pcir_offset = rom_header.pci_data_struct_offset as usize; -+ let pcir_offset = usize::from(rom_header.pci_data_struct_offset); - let pcir_data = data - .get(pcir_offset..pcir_offset + core::mem::size_of::()) - .ok_or(EINVAL) -@@ -843,12 +843,12 @@ fn falcon_data_ptr(&self) -> Result { - let token = self.get_bit_token(BIT_TOKEN_ID_FALCON_DATA)?; - - // Make sure we don't go out of bounds -- if token.data_offset as usize + 4 > self.base.data.len() { -+ if usize::from(token.data_offset) + 4 > self.base.data.len() { - return Err(EINVAL); - } - - // read the 4 bytes at the offset specified in the token -- let offset = token.data_offset as usize; -+ let offset = usize::from(token.data_offset); - let bytes: [u8; 4] = self.base.data[offset..offset + 4].try_into().map_err(|_| { - dev_err!(self.base.dev, "Failed to convert data slice to array"); - EINVAL -@@ -924,9 +924,9 @@ fn new(dev: &device::Device, data: &[u8]) -> Result { - return Err(EINVAL); - } - -- let header_len = data[1] as usize; -- let entry_len = data[2] as usize; -- let entry_count = data[3] as usize; -+ let header_len = usize::from(data[1]); -+ let entry_len = usize::from(data[2]); -+ let entry_count = usize::from(data[3]); - - let required_bytes = header_len + (entry_count * entry_len); - -@@ -949,9 +949,9 @@ fn new(dev: &device::Device, data: &[u8]) -> Result { - - Ok(PmuLookupTable { - version: data[0], -- header_len: header_len as u8, -- entry_len: entry_len as u8, -- entry_count: entry_count as u8, -+ header_len: data[1], -+ entry_len: data[2], -+ entry_count: data[3], - table_data, - }) - } -@@ -961,7 +961,7 @@ fn lookup_index(&self, idx: u8) -> Result { - return Err(EINVAL); - } - -- let index = (idx as usize) * self.entry_len as usize; -+ let index = (usize::from(idx)) * usize::from(self.entry_len); - PmuLookupTableEntry::new(&self.table_data[index..]) - } - -@@ -1130,8 +1130,8 @@ pub(crate) fn ucode(&self, desc: &FalconUCodeDescV3) -> Result<&[u8]> { - pub(crate) fn sigs(&self, desc: &FalconUCodeDescV3) -> Result<&[Bcrt30Rsa3kSignature]> { - // The signatures data follows the descriptor. - let sigs_data_offset = self.falcon_ucode_offset + core::mem::size_of::(); -- let sigs_size = -- desc.signature_count as usize * core::mem::size_of::(); -+ let sigs_count = usize::from(desc.signature_count); -+ let sigs_size = sigs_count * core::mem::size_of::(); - - // Make sure the data is within bounds. - if sigs_data_offset + sigs_size > self.base.data.len() { -@@ -1151,7 +1151,7 @@ pub(crate) fn sigs(&self, desc: &FalconUCodeDescV3) -> Result<&[Bcrt30Rsa3kSigna - .as_ptr() - .add(sigs_data_offset) - .cast::(), -- desc.signature_count as usize, -+ sigs_count, - ) - }) - } --- -2.51.0 - diff --git a/queue-6.18/gpu-nova-core-replace-wait_on-with-kernel-equivalent.patch b/queue-6.18/gpu-nova-core-replace-wait_on-with-kernel-equivalent.patch deleted file mode 100644 index d51b66a1c5..0000000000 --- a/queue-6.18/gpu-nova-core-replace-wait_on-with-kernel-equivalent.patch +++ /dev/null @@ -1,312 +0,0 @@ -From 6a682bb901f7f96c25552107df05683a7560629c Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Mon, 20 Oct 2025 15:09:25 +0900 -Subject: gpu: nova-core: replace wait_on with kernel equivalents - -From: Alexandre Courbot - -[ Upstream commit 76544ef6a01b2d8fa86f92ff17940b6ff534696e ] - -wait_on was a temporary helper function waiting for a kernel crate -equivalent. - -Now that read_poll_timeout and fsleep are available, use them and remove -wait_on. - -Acked-by: Danilo Krummrich -Signed-off-by: Alexandre Courbot -Message-ID: <20251020-nova_wait_on-v1-1-2eb87fb38d14@nvidia.com> -Stable-dep-of: 5cf76277cdec ("gpu: nova-core: check for overflow to DMATRFBASE1") -Signed-off-by: Sasha Levin ---- - Documentation/gpu/nova/core/todo.rst | 11 ---- - drivers/gpu/nova-core/falcon.rs | 62 ++++++++++------------- - drivers/gpu/nova-core/falcon/hal/ga102.rs | 16 +++--- - drivers/gpu/nova-core/gfw.rs | 36 ++++++------- - drivers/gpu/nova-core/nova_core.rs | 1 - - drivers/gpu/nova-core/util.rs | 27 ---------- - 6 files changed, 51 insertions(+), 102 deletions(-) - delete mode 100644 drivers/gpu/nova-core/util.rs - -diff --git a/Documentation/gpu/nova/core/todo.rst b/Documentation/gpu/nova/core/todo.rst -index 0972cb905f7ae..c55c7bedbfdfa 100644 ---- a/Documentation/gpu/nova/core/todo.rst -+++ b/Documentation/gpu/nova/core/todo.rst -@@ -153,17 +153,6 @@ A `num` core kernel module is being designed to provide these operations. - | Complexity: Intermediate - | Contact: Alexandre Courbot - --Delay / Sleep abstractions [DLAY] ----------------------------------- -- --Rust abstractions for the kernel's delay() and sleep() functions. -- --FUJITA Tomonori plans to work on abstractions for read_poll_timeout_atomic() --(and friends) [1]. -- --| Complexity: Beginner --| Link: https://lore.kernel.org/netdev/20250228.080550.354359820929821928.fujita.tomonori@gmail.com/ [1] -- - IRQ abstractions - ---------------- - -diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs -index 37e6298195e49..05856b43b51c3 100644 ---- a/drivers/gpu/nova-core/falcon.rs -+++ b/drivers/gpu/nova-core/falcon.rs -@@ -6,8 +6,10 @@ - use hal::FalconHal; - use kernel::device; - use kernel::dma::DmaAddress; -+use kernel::io::poll::read_poll_timeout; - use kernel::prelude::*; - use kernel::sync::aref::ARef; -+use kernel::time::delay::fsleep; - use kernel::time::Delta; - - use crate::dma::DmaObject; -@@ -15,7 +17,6 @@ - use crate::gpu::Chipset; - use crate::regs; - use crate::regs::macros::RegisterBase; --use crate::util; - - pub(crate) mod gsp; - mod hal; -@@ -380,13 +381,13 @@ pub(crate) fn new( - /// Wait for memory scrubbing to complete. - fn reset_wait_mem_scrubbing(&self, bar: &Bar0) -> Result { - // TIMEOUT: memory scrubbing should complete in less than 20ms. -- util::wait_on(Delta::from_millis(20), || { -- if regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID).mem_scrubbing_done() { -- Some(()) -- } else { -- None -- } -- }) -+ read_poll_timeout( -+ || Ok(regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID)), -+ |r| r.mem_scrubbing_done(), -+ Delta::ZERO, -+ Delta::from_millis(20), -+ ) -+ .map(|_| ()) - } - - /// Reset the falcon engine. -@@ -395,20 +396,17 @@ fn reset_eng(&self, bar: &Bar0) -> Result { - - // According to OpenRM's `kflcnPreResetWait_GA102` documentation, HW sometimes does not set - // RESET_READY so a non-failing timeout is used. -- let _ = util::wait_on(Delta::from_micros(150), || { -- let r = regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID); -- if r.reset_ready() { -- Some(()) -- } else { -- None -- } -- }); -+ let _ = read_poll_timeout( -+ || Ok(regs::NV_PFALCON_FALCON_HWCFG2::read(bar, &E::ID)), -+ |r| r.reset_ready(), -+ Delta::ZERO, -+ Delta::from_micros(150), -+ ); - - regs::NV_PFALCON_FALCON_ENGINE::alter(bar, &E::ID, |v| v.set_reset(true)); - -- // TODO[DLAY]: replace with udelay() or equivalent once available. - // TIMEOUT: falcon engine should not take more than 10us to reset. -- let _: Result = util::wait_on(Delta::from_micros(10), || None); -+ fsleep(Delta::from_micros(10)); - - regs::NV_PFALCON_FALCON_ENGINE::alter(bar, &E::ID, |v| v.set_reset(false)); - -@@ -512,14 +510,12 @@ fn dma_wr>( - // Wait for the transfer to complete. - // TIMEOUT: arbitrarily large value, no DMA transfer to the falcon's small memories - // should ever take that long. -- util::wait_on(Delta::from_secs(2), || { -- let r = regs::NV_PFALCON_FALCON_DMATRFCMD::read(bar, &E::ID); -- if r.idle() { -- Some(()) -- } else { -- None -- } -- })?; -+ read_poll_timeout( -+ || Ok(regs::NV_PFALCON_FALCON_DMATRFCMD::read(bar, &E::ID)), -+ |r| r.idle(), -+ Delta::ZERO, -+ Delta::from_secs(2), -+ )?; - } - - Ok(()) -@@ -582,14 +578,12 @@ pub(crate) fn boot( - } - - // TIMEOUT: arbitrarily large value, firmwares should complete in less than 2 seconds. -- util::wait_on(Delta::from_secs(2), || { -- let r = regs::NV_PFALCON_FALCON_CPUCTL::read(bar, &E::ID); -- if r.halted() { -- Some(()) -- } else { -- None -- } -- })?; -+ read_poll_timeout( -+ || Ok(regs::NV_PFALCON_FALCON_CPUCTL::read(bar, &E::ID)), -+ |r| r.halted(), -+ Delta::ZERO, -+ Delta::from_secs(2), -+ )?; - - let (mbox0, mbox1) = ( - regs::NV_PFALCON_FALCON_MAILBOX0::read(bar, &E::ID).value(), -diff --git a/drivers/gpu/nova-core/falcon/hal/ga102.rs b/drivers/gpu/nova-core/falcon/hal/ga102.rs -index 0b1cbe7853b3e..f2ae9537321d0 100644 ---- a/drivers/gpu/nova-core/falcon/hal/ga102.rs -+++ b/drivers/gpu/nova-core/falcon/hal/ga102.rs -@@ -3,6 +3,7 @@ - use core::marker::PhantomData; - - use kernel::device; -+use kernel::io::poll::read_poll_timeout; - use kernel::prelude::*; - use kernel::time::Delta; - -@@ -11,7 +12,6 @@ - Falcon, FalconBromParams, FalconEngine, FalconModSelAlgo, PeregrineCoreSelect, - }; - use crate::regs; --use crate::util; - - use super::FalconHal; - -@@ -23,14 +23,12 @@ fn select_core_ga102(bar: &Bar0) -> Result { - .write(bar, &E::ID); - - // TIMEOUT: falcon core should take less than 10ms to report being enabled. -- util::wait_on(Delta::from_millis(10), || { -- let r = regs::NV_PRISCV_RISCV_BCR_CTRL::read(bar, &E::ID); -- if r.valid() { -- Some(()) -- } else { -- None -- } -- })?; -+ read_poll_timeout( -+ || Ok(regs::NV_PRISCV_RISCV_BCR_CTRL::read(bar, &E::ID)), -+ |r| r.valid(), -+ Delta::ZERO, -+ Delta::from_millis(10), -+ )?; - } - - Ok(()) -diff --git a/drivers/gpu/nova-core/gfw.rs b/drivers/gpu/nova-core/gfw.rs -index 8ac1ed1871992..23c28c2a3793a 100644 ---- a/drivers/gpu/nova-core/gfw.rs -+++ b/drivers/gpu/nova-core/gfw.rs -@@ -18,13 +18,12 @@ - //! - //! Note that the devinit sequence also needs to run during suspend/resume. - --use kernel::bindings; -+use kernel::io::poll::read_poll_timeout; - use kernel::prelude::*; - use kernel::time::Delta; - - use crate::driver::Bar0; - use crate::regs; --use crate::util; - - /// Wait for the `GFW` (GPU firmware) boot completion signal (`GFW_BOOT`), or a 4 seconds timeout. - /// -@@ -50,22 +49,19 @@ pub(crate) fn wait_gfw_boot_completion(bar: &Bar0) -> Result { - // - // TIMEOUT: arbitrarily large value. GFW starts running immediately after the GPU is put out of - // reset, and should complete in less time than that. -- util::wait_on(Delta::from_secs(4), || { -- // Check that FWSEC has lowered its protection level before reading the GFW_BOOT status. -- let gfw_booted = regs::NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_PRIV_LEVEL_MASK::read(bar) -- .read_protection_level0() -- && regs::NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_0_GFW_BOOT::read(bar).completed(); -- -- if gfw_booted { -- Some(()) -- } else { -- // TODO[DLAY]: replace with [1] once it merges. -- // [1] https://lore.kernel.org/rust-for-linux/20250423192857.199712-6-fujita.tomonori@gmail.com/ -- // -- // SAFETY: `msleep()` is safe to call with any parameter. -- unsafe { bindings::msleep(1) }; -- -- None -- } -- }) -+ read_poll_timeout( -+ || { -+ Ok( -+ // Check that FWSEC has lowered its protection level before reading the GFW_BOOT -+ // status. -+ regs::NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_PRIV_LEVEL_MASK::read(bar) -+ .read_protection_level0() -+ && regs::NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_0_GFW_BOOT::read(bar).completed(), -+ ) -+ }, -+ |&gfw_booted| gfw_booted, -+ Delta::from_millis(1), -+ Delta::from_secs(4), -+ ) -+ .map(|_| ()) - } -diff --git a/drivers/gpu/nova-core/nova_core.rs b/drivers/gpu/nova-core/nova_core.rs -index fffcaee2249fe..db062e31a5e23 100644 ---- a/drivers/gpu/nova-core/nova_core.rs -+++ b/drivers/gpu/nova-core/nova_core.rs -@@ -11,7 +11,6 @@ - mod gpu; - mod gsp; - mod regs; --mod util; - mod vbios; - - pub(crate) const MODULE_NAME: &kernel::str::CStr = ::NAME; -diff --git a/drivers/gpu/nova-core/util.rs b/drivers/gpu/nova-core/util.rs -deleted file mode 100644 -index bf35f00cb732e..0000000000000 ---- a/drivers/gpu/nova-core/util.rs -+++ /dev/null -@@ -1,27 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 -- --use kernel::prelude::*; --use kernel::time::{Delta, Instant, Monotonic}; -- --/// Wait until `cond` is true or `timeout` elapsed. --/// --/// When `cond` evaluates to `Some`, its return value is returned. --/// --/// `Err(ETIMEDOUT)` is returned if `timeout` has been reached without `cond` evaluating to --/// `Some`. --/// --/// TODO[DLAY]: replace with `read_poll_timeout` once it is available. --/// (https://lore.kernel.org/lkml/20250220070611.214262-8-fujita.tomonori@gmail.com/) --pub(crate) fn wait_on Option>(timeout: Delta, cond: F) -> Result { -- let start_time = Instant::::now(); -- -- loop { -- if let Some(ret) = cond() { -- return Ok(ret); -- } -- -- if start_time.elapsed().as_nanos() > timeout.as_nanos() { -- return Err(ETIMEDOUT); -- } -- } --} --- -2.51.0 - diff --git a/queue-6.18/gpu-nova-core-vbios-use-frombytes-for-pmulookuptable.patch b/queue-6.18/gpu-nova-core-vbios-use-frombytes-for-pmulookuptable.patch deleted file mode 100644 index 0d5507857a..0000000000 --- a/queue-6.18/gpu-nova-core-vbios-use-frombytes-for-pmulookuptable.patch +++ /dev/null @@ -1,115 +0,0 @@ -From a0fedab2fb653e4b3c6a08fe660e93d65de418a5 Mon Sep 17 00:00:00 2001 -From: Sasha Levin -Date: Wed, 29 Oct 2025 00:07:37 +0900 -Subject: gpu: nova-core: vbios: use FromBytes for PmuLookupTable header - -From: Alexandre Courbot - -[ Upstream commit 7f74842d95d1a24c68d23320de4f3eb27e6ba82b ] - -Use `from_bytes_copy_prefix` to create the `PmuLookupTable` header -instead of building it ourselves from the bytes stream. This lets us -remove a few `as` conversions and array accesses. - -Reviewed-by: Joel Fernandes -Signed-off-by: Alexandre Courbot -Message-ID: <20251029-nova-vbios-frombytes-v1-2-ac441ebc1de3@nvidia.com> -Stable-dep-of: 5cf76277cdec ("gpu: nova-core: check for overflow to DMATRFBASE1") -Signed-off-by: Sasha Levin ---- - drivers/gpu/nova-core/vbios.rs | 42 +++++++++++++++++----------------- - 1 file changed, 21 insertions(+), 21 deletions(-) - -diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs -index 42ac83365e9b3..0dfefad88cc6a 100644 ---- a/drivers/gpu/nova-core/vbios.rs -+++ b/drivers/gpu/nova-core/vbios.rs -@@ -10,6 +10,7 @@ - use kernel::error::Result; - use kernel::prelude::*; - use kernel::ptr::{Alignable, Alignment}; -+use kernel::transmute::FromBytes; - use kernel::types::ARef; - - /// The offset of the VBIOS ROM in the BAR0 space. -@@ -904,29 +905,34 @@ fn new(data: &[u8]) -> Result { - } - } - -+#[repr(C)] -+struct PmuLookupTableHeader { -+ version: u8, -+ header_len: u8, -+ entry_len: u8, -+ entry_count: u8, -+} -+ -+// SAFETY: all bit patterns are valid for `PmuLookupTableHeader`. -+unsafe impl FromBytes for PmuLookupTableHeader {} -+ - /// The [`PmuLookupTableEntry`] structure is used to find the [`PmuLookupTableEntry`] for a given - /// application ID. - /// - /// The table of entries is pointed to by the falcon data pointer in the BIT table, and is used to - /// locate the Falcon Ucode. --#[expect(dead_code)] - struct PmuLookupTable { -- version: u8, -- header_len: u8, -- entry_len: u8, -- entry_count: u8, -+ header: PmuLookupTableHeader, - table_data: KVec, - } - - impl PmuLookupTable { - fn new(dev: &device::Device, data: &[u8]) -> Result { -- if data.len() < 4 { -- return Err(EINVAL); -- } -+ let (header, _) = PmuLookupTableHeader::from_bytes_copy_prefix(data).ok_or(EINVAL)?; - -- let header_len = usize::from(data[1]); -- let entry_len = usize::from(data[2]); -- let entry_count = usize::from(data[3]); -+ let header_len = usize::from(header.header_len); -+ let entry_len = usize::from(header.entry_len); -+ let entry_count = usize::from(header.entry_count); - - let required_bytes = header_len + (entry_count * entry_len); - -@@ -947,27 +953,21 @@ fn new(dev: &device::Device, data: &[u8]) -> Result { - dev_dbg!(dev, "PMU entry: {:02x?}\n", &data[i..][..entry_len]); - } - -- Ok(PmuLookupTable { -- version: data[0], -- header_len: data[1], -- entry_len: data[2], -- entry_count: data[3], -- table_data, -- }) -+ Ok(PmuLookupTable { header, table_data }) - } - - fn lookup_index(&self, idx: u8) -> Result { -- if idx >= self.entry_count { -+ if idx >= self.header.entry_count { - return Err(EINVAL); - } - -- let index = (usize::from(idx)) * usize::from(self.entry_len); -+ let index = (usize::from(idx)) * usize::from(self.header.entry_len); - PmuLookupTableEntry::new(&self.table_data[index..]) - } - - // find entry by type value - fn find_entry_by_type(&self, entry_type: u8) -> Result { -- for i in 0..self.entry_count { -+ for i in 0..self.header.entry_count { - let entry = self.lookup_index(i)?; - if entry.application_id == entry_type { - return Ok(entry); --- -2.51.0 - diff --git a/queue-6.18/series b/queue-6.18/series index fa8fd2f03a..092fe9a9ba 100644 --- a/queue-6.18/series +++ b/queue-6.18/series @@ -196,11 +196,6 @@ drm-msm-dp-update-msm_dp_controller-ids-for-sa8775p.patch mei-late_bind-fix-struct-intel_lb_component_ops-kern.patch regulator-core-move-supply-check-earlier-in-set_mach.patch hid-playstation-add-missing-check-for-input_ff_creat.patch -gpu-nova-core-replace-wait_on-with-kernel-equivalent.patch -gpu-nova-core-replace-as-with-from-conversions-where.patch -gpu-nova-core-vbios-use-frombytes-for-pmulookuptable.patch -gpu-nova-core-apply-the-one-use-item-per-line-policy.patch -gpu-nova-core-check-for-overflow-to-dmatrfbase1.patch drm-msm-disp-set-num_planes-to-1-for-interleaved-yuv.patch drm-msm-dpu-fix-cmd-panels-on-dpu-1.x-3.x.patch drm-msm-dsi_phy_14nm-convert-from-divider_round_rate.patch