From: Lin Sinan Date: Tue, 28 Feb 2023 05:00:36 +0000 (+0800) Subject: RISC-V: Fix wrong partial subreg check for bsetidisi X-Git-Tag: basepoints/gcc-14~725 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9debb240a4b1a711c0648fd9e4385dbde5ad45fd;p=thirdparty%2Fgcc.git RISC-V: Fix wrong partial subreg check for bsetidisi The partial subreg check should be for subreg operand(operand 1) instead of the immediate operand(operand 2). This change also fix pr68648.c in zbs. gcc/ChangeLog: * config/riscv/bitmanip.md: Fix wrong index in the check. Reviewed-by: --- diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md index 14d18edbe62b..58a86bd929f1 100644 --- a/gcc/config/riscv/bitmanip.md +++ b/gcc/config/riscv/bitmanip.md @@ -442,7 +442,7 @@ (ior:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "r")) (match_operand 2 "single_bit_mask_operand" "i")))] "TARGET_ZBS && TARGET_64BIT - && !partial_subreg_p (operands[2])" + && !partial_subreg_p (operands[1])" "bseti\t%0,%1,%S2" [(set_attr "type" "bitmanip")])