From: Richard Earnshaw <rearnsha@arm.com>
Date: Fri, 26 May 2000 09:31:50 +0000 (+0000)
Subject: * arm.md (negdi2): Add clobber of condition code register.
X-Git-Tag: prereleases/gcc-2.95.3-test1~64
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9e5e2691765d5260e51ac7df6249fad4bd326050;p=thirdparty%2Fgcc.git

* arm.md (negdi2): Add clobber of condition code register.

From-SVN: r34191
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 60622c6900f9..61272bd79e77 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+Fri May 26 10:30:02 2000  Richard Earnshaw (rearnsha@arm.com)
+
+	* arm.md (negdi2): Add clobber of condition code register.
+
 Wed May 24 00:25:45 2000  Alexandre Oliva  <oliva@lsd.ic.unicamp.br>
 
 	2000-05-22  Richard Henderson  <rth@cygnus.com>
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 16e66181eadb..7ccbb5cb2d1e 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1837,7 +1837,8 @@
 
 (define_insn "negdi2"
   [(set (match_operand:DI 0 "s_register_operand" "=&r,&r")
-	(neg:DI (match_operand:DI 1 "s_register_operand" "?r,0")))]
+	(neg:DI (match_operand:DI 1 "s_register_operand" "?r,0")))
+   (clobber (reg:CC 24))]
   ""
   "rsbs\\t%Q0, %Q1, #0\;rsc\\t%R0, %R1, #0"
 [(set_attr "conds" "clob")