From: Sibi Sankar Date: Wed, 12 Jun 2024 12:40:54 +0000 (+0530) Subject: arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region X-Git-Tag: v6.13-rc1~140^2~22^2~53 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9ed1a2b8784262e85ec300792a1a37ebd8473be2;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: qcom: x1e80100: Resize GIC Redistributor register region Resize the GICR register region as it currently seeps into the CPU Control Processor mailbox RX region. Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Signed-off-by: Sibi Sankar Link: https://lore.kernel.org/r/20240612124056.39230-4-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index f3fb527c0b088..a85a7bdfbf526 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5754,7 +5754,7 @@ intc: interrupt-controller@17000000 { compatible = "arm,gic-v3"; reg = <0 0x17000000 0 0x10000>, /* GICD */ - <0 0x17080000 0 0x480000>; /* GICR * 12 */ + <0 0x17080000 0 0x300000>; /* GICR * 12 */ interrupts = ;