From: Wolfgang Gellerich Date: Fri, 30 Jan 2009 10:50:31 +0000 (+0000) Subject: 2009-01-30 Wolfgang Gellerich X-Git-Tag: releases/gcc-4.4.0~695 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=9fec758df2bc78c0babf774ae98ee0c3146501f1;p=thirdparty%2Fgcc.git 2009-01-30 Wolfgang Gellerich * config/s390/s390.md (*insv_reg_extimm): Removed. (*insv_h_di_reg_extimm): New insn. (*insv_l_reg_extimm): New insn. From-SVN: r143786 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6dc807bb4ca9..c700951184b8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,10 +1,16 @@ -Hariharan Sandanagobalane +2009-01-30 Wolfgang Gellerich + + * config/s390/s390.md (*insv_reg_extimm): Removed. + (*insv_h_di_reg_extimm): New insn. + (*insv_l_reg_extimm): New insn. + +2009-01-30 Hariharan Sandanagobalane * config/picochip/picochip.c (flag_conserve_stack): set PARAM_LARGE_STACK_FRAME and PARAM_STACK_FRAME_GROWTH to zero under fconserve-stack. Reduce call-overhead used by inliner. -Hariharan Sandanagobalane +2009-01-30 Hariharan Sandanagobalane PR/38157 * common.opt (flag_conserve_stack): Initialised to zero. diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 9c21977d506d..0e5546a804b5 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -3378,27 +3378,28 @@ [(set_attr "op_type" "RI") (set_attr "z10prop" "z10_super_E1")]) +; Update the left-most 32 bit of a DI. +(define_insn "*insv_h_di_reg_extimm" + [(set (zero_extract:DI (match_operand:DI 0 "register_operand" "+d") + (const_int 32) + (const_int 0)) + (match_operand:DI 1 "const_int_operand" "n"))] + "TARGET_EXTIMM" + "iihf\t%0,%o1" + [(set_attr "op_type" "RIL") + (set_attr "z10prop" "z10_fwd_E1")]) -(define_insn "*insv_reg_extimm" +; Update the right-most 32 bit of a DI, or the whole of a SI. +(define_insn "*insv_l_reg_extimm" [(set (zero_extract:P (match_operand:P 0 "register_operand" "+d") (const_int 32) (match_operand 1 "const_int_operand" "n")) (match_operand:P 2 "const_int_operand" "n"))] "TARGET_EXTIMM - && INTVAL (operands[1]) >= 0 - && INTVAL (operands[1]) < BITS_PER_WORD - && INTVAL (operands[1]) % 32 == 0" -{ - switch (BITS_PER_WORD - INTVAL (operands[1])) - { - case 64: return "iihf\t%0,%o2"; break; - case 32: return "iilf\t%0,%o2"; break; - default: gcc_unreachable(); - } -} + && BITS_PER_WORD - INTVAL (operands[1]) == 32" + "iilf\t%0,%o2" [(set_attr "op_type" "RIL") - (set_attr "z10prop" "z10_fwd_E1")]) - + (set_attr "z10prop" "z10_fwd_A1")]) ; ; extendsidi2 instruction pattern(s).