From: Peter Bergner Date: Sat, 29 Feb 2020 22:30:48 +0000 (-0600) Subject: Revert "Fix bad code of vector extract of PC-relative address with variable element #." X-Git-Tag: releases/gcc-9.3.0~50 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a0e22367235f5cd092f9d7800f17081ca4dc79e8;p=thirdparty%2Fgcc.git Revert "Fix bad code of vector extract of PC-relative address with variable element #." This reverts commit 48558cdf49373ba508cf8d7fcaaafb383316f644. See PR93974. --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 86825b16a992..2ed1f2ea20c2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -116,20 +116,6 @@ (maybe_run_lto_and_relink): Avoid possible signal handler access to unintialzed memory (lto_o_files). -2020-02-23 Peter Bergner - - Backport from master - 2020-01-06 Michael Meissner - - * config/rs6000/vsx.md (vsx_extract__var, VSX_D iterator): - Use 'Q' for doing vector extract from memory. - (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from - memory. - (vsx_extract__var, VSX_EXTRACT_I iterator): Use 'Q' for - doing vector extract from memory. - (vsx_extract__mode_var): Use 'Q' for doing vector - extract from memory. - 2020-02-21 John David Anglin * gcc/config/pa/pa.c (pa_function_value): Fix check for word and diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 5973e0a399da..607c0cd33f21 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3295,7 +3295,7 @@ ;; Variable V2DI/V2DF extract (define_insn_and_split "vsx_extract__var" [(set (match_operand: 0 "gpc_reg_operand" "=v,,r") - (unspec: [(match_operand:VSX_D 1 "input_operand" "v,Q,Q") + (unspec: [(match_operand:VSX_D 1 "input_operand" "v,m,m") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,&b,&b")) @@ -3364,7 +3364,7 @@ ;; Variable V4SF extract (define_insn_and_split "vsx_extract_v4sf_var" [(set (match_operand:SF 0 "gpc_reg_operand" "=ww,ww,?r") - (unspec:SF [(match_operand:V4SF 1 "input_operand" "v,Q,Q") + (unspec:SF [(match_operand:V4SF 1 "input_operand" "v,m,m") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,&b,&b")) @@ -3724,7 +3724,7 @@ (define_insn_and_split "vsx_extract__var" [(set (match_operand: 0 "gpc_reg_operand" "=r,r,r") (unspec: - [(match_operand:VSX_EXTRACT_I 1 "input_operand" "wK,v,Q") + [(match_operand:VSX_EXTRACT_I 1 "input_operand" "wK,v,m") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,r,&b")) @@ -3743,7 +3743,7 @@ [(set (match_operand: 0 "gpc_reg_operand" "=r,r,r") (zero_extend: (unspec: - [(match_operand:VSX_EXTRACT_I 1 "input_operand" "wK,v,Q") + [(match_operand:VSX_EXTRACT_I 1 "input_operand" "wK,v,m") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT))) (clobber (match_scratch:DI 3 "=r,r,&b"))