From: Julian Seward Date: Thu, 26 Apr 2012 14:16:52 +0000 (+0000) Subject: Add a feature check flag for AVX. X-Git-Tag: svn/VALGRIND_3_8_1^2~162 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a206f165eef0707f313f47559ad720bb42799105;p=thirdparty%2Fvalgrind.git Add a feature check flag for AVX. git-svn-id: svn://svn.valgrind.org/vex/trunk@2316 --- diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c index 8cc0d3c063..cbd30b8e6e 100644 --- a/VEX/priv/host_amd64_isel.c +++ b/VEX/priv/host_amd64_isel.c @@ -4327,7 +4327,8 @@ HInstrArray* iselSB_AMD64 ( IRSB* bb, vassert(0 == (hwcaps_host & ~(VEX_HWCAPS_AMD64_SSE3 | VEX_HWCAPS_AMD64_CX16 - | VEX_HWCAPS_AMD64_LZCNT))); + | VEX_HWCAPS_AMD64_LZCNT + | VEX_HWCAPS_AMD64_AVX))); /* Make up an initial environment to use. */ env = LibVEX_Alloc(sizeof(ISelEnv)); diff --git a/VEX/priv/main_main.c b/VEX/priv/main_main.c index c73c5d291a..4d11a671d9 100644 --- a/VEX/priv/main_main.c +++ b/VEX/priv/main_main.c @@ -1050,7 +1050,11 @@ static HChar* show_hwcaps_amd64 ( UInt hwcaps ) /* SSE3 and CX16 are orthogonal and > baseline, although we really don't expect to come across anything which can do SSE3 but can't do CX16. Still, we can handle that case. LZCNT is similarly - orthogonal. */ + orthogonal. AVX is technically orthogonal, but just add the + cases we actually come across. (This scheme for printing is + very stupid. We should add strings independently based on + feature bits, but then it would be hard to return a string that + didn't need deallocating by the caller.) */ switch (hwcaps) { case 0: return "amd64-sse2"; @@ -1067,7 +1071,9 @@ static HChar* show_hwcaps_amd64 ( UInt hwcaps ) case VEX_HWCAPS_AMD64_SSE3 | VEX_HWCAPS_AMD64_CX16 | VEX_HWCAPS_AMD64_LZCNT: return "amd64-sse3-cx16-lzcnt"; - + case VEX_HWCAPS_AMD64_SSE3 | VEX_HWCAPS_AMD64_CX16 + | VEX_HWCAPS_AMD64_AVX: + return "amd64-sse3-cx16-avx"; default: return NULL; } diff --git a/VEX/pub/libvex.h b/VEX/pub/libvex.h index ef50206cc8..51495e1862 100644 --- a/VEX/pub/libvex.h +++ b/VEX/pub/libvex.h @@ -80,6 +80,7 @@ typedef #define VEX_HWCAPS_AMD64_SSE3 (1<<5) /* SSE3 support */ #define VEX_HWCAPS_AMD64_CX16 (1<<6) /* cmpxchg16b support */ #define VEX_HWCAPS_AMD64_LZCNT (1<<7) /* SSE4a LZCNT insn */ +#define VEX_HWCAPS_AMD64_AVX (1<<8) /* AVX instructions */ /* ppc32: baseline capability is integer only */ #define VEX_HWCAPS_PPC32_F (1<<8) /* basic (non-optional) FP */