From: Andreas Arnez Date: Fri, 29 Sep 2023 14:11:31 +0000 (+0200) Subject: s390x regtest: Adjust various test cases for Clang X-Git-Tag: VALGRIND_3_22_0~47 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a23b9bf5dfc9f0fd883a16ff10ba712e205a4435;p=thirdparty%2Fvalgrind.git s390x regtest: Adjust various test cases for Clang There are various issues when compiling the s390x test cases with Clang (see Bug 465782): * Bugs in inline assemblies tolerated/obscured by GCC: - "d" (or "r") constraint instead of "a" where a register from 1-15 is needed - mix-up between vector register and general register in inline assembly - too unspecific constraints such as "m" or "g" - use of input operand for output - missing register clobber declaration * Missing Clang features: - "%R" (register) and "%O" (offset) modifiers with address constraints in inline assemblies - variable-length array within a struct * Use of the -mlong-double-128 command line option -- has been redundant for some time with GCC, and Clang only supports 128-bit long double * Bad definition of _FPU_SETCW/_FPU_GETCW in (See https://sourceware.org/bugzilla/show_bug.cgi?id=30130) * Use of pow() function without linking libm -- GCC optimizes the call away, while Clang keeps a reference to pow() Perform appropriate changes to the test cases such that they can be compiled both with Clang and with GCC. --- diff --git a/none/tests/s390x/Makefile.am b/none/tests/s390x/Makefile.am index 6c23c484e4..73e7b28e5d 100644 --- a/none/tests/s390x/Makefile.am +++ b/none/tests/s390x/Makefile.am @@ -21,11 +21,8 @@ INSN_TESTS = clc clcle cvb cvd icm lpr tcxb lam_stam xc mvst add sub mul \ spechelper-tm laa vector lsc2 ppno vector_string vector_integer \ vector_float add-z14 sub-z14 mul-z14 bic \ misc3 vec2 vec2_float \ - dfp-1 dfp-2 dfp-3 dfp-4 dfpconv dfpext dfptest pfpo srnmt - -if HAS_MLONG_DOUBLE_128 - INSN_TESTS += fpext fixbr -endif + dfp-1 dfp-2 dfp-3 dfp-4 dfpconv dfpext dfptest pfpo srnmt \ + fpext fixbr check_PROGRAMS = $(INSN_TESTS) \ allexec \ @@ -65,8 +62,6 @@ cu12_1_CFLAGS = $(AM_CFLAGS) -DM3=1 cu14_1_CFLAGS = $(AM_CFLAGS) -DM3=1 cu21_1_CFLAGS = $(AM_CFLAGS) -DM3=1 cu24_1_CFLAGS = $(AM_CFLAGS) -DM3=1 -fixbr_CFLAGS = $(AM_CFLAGS) @FLAG_MLONG_DOUBLE_128@ -fpext_CFLAGS = $(AM_CFLAGS) @FLAG_MLONG_DOUBLE_128@ ex_clone_LDADD = -lpthread vector_CFLAGS = $(AM_CFLAGS) -march=z13 lsc2_CFLAGS = -march=z13 -DS390_TESTS_NOCOLOR diff --git a/none/tests/s390x/bic.c b/none/tests/s390x/bic.c index a8d28d9d69..e703cc4c4b 100644 --- a/none/tests/s390x/bic.c +++ b/none/tests/s390x/bic.c @@ -35,8 +35,8 @@ static int bic0(int i) "lg %[table],0(%[i],%[table])\n" "br %[table]\n" TAIL - : [i] "+d" (i) - , [table] "=d" (table) + : [i] "+a" (i) + , [table] "=a" (table) :: "cc"); return i; } @@ -47,8 +47,8 @@ static int bic4(int i) asm volatile(HEAD ".insn rxy, 0xe30000000047, 4, 0(%[i],%[table])\n" TAIL - : [i] "+d" (i) - , [table] "=d" (table) + : [i] "+a" (i) + , [table] "=a" (table) :: "cc"); return i; } @@ -60,8 +60,8 @@ static int bic15(int i) "brcl 10, 0f\n" ".insn rxy, 0xe30000000047, 15, 0(%[i],%[table])\n" TAIL - : [i] "+d" (i) - , [table] "=d" (table) + : [i] "+a" (i) + , [table] "=a" (table) :: "cc"); return i; } diff --git a/none/tests/s390x/clc.c b/none/tests/s390x/clc.c index e3e8301ff6..4640bd5fd5 100644 --- a/none/tests/s390x/clc.c +++ b/none/tests/s390x/clc.c @@ -19,7 +19,7 @@ static int clc(char *a1,char *a2, int l) "2: ipm %0\n" "srl %0,28\n" :"=d" (cc) - :"a" (a1), "a" (a2), "d" (l): "1", "cc"); + :"a" (a1), "a" (a2), "a" (l): "1", "cc"); return cc; } diff --git a/none/tests/s390x/lsc2.c b/none/tests/s390x/lsc2.c index c026dcbd62..d8f59f72c9 100644 --- a/none/tests/s390x/lsc2.c +++ b/none/tests/s390x/lsc2.c @@ -98,13 +98,10 @@ /* load and zero rightmost byte */ static bool test_lzrf(const uint32_t testedValue) { - uint32_t after = testedValue; + uint32_t after; uint32_t expected = testedValue & 0xffffff00; - __asm__ volatile("lzrf %%r6, %0\n" - "st %%r6, %0\n" - : - : "g"(after)); + __asm__ volatile("lzrf %0, %1" : "=d"(after) : "T"(testedValue) : ); SMART_RETURN_R64(lzrf); } @@ -114,11 +111,7 @@ static bool test_lzrg(const uint64_t testedValue) uint64_t after = testedValue; uint64_t expected = testedValue & 0xffffffffffffff00UL; - __asm__ volatile("lzrg %%r6, %0\n" - "stg %%r6, %0\n" - : - : "g"(after)); - + __asm__ volatile("lzrg %0, %1" : "=d"(after) : "T"(testedValue) : ); SMART_RETURN_R64(lzrg); } @@ -126,13 +119,9 @@ static bool test_lzrg(const uint64_t testedValue) static bool test_llzrgf(const uint32_t testedValue) { uint64_t after = 0; - uint64_t expected = ((uint64_t)testedValue << 32) & 0xffffff0000000000UL; - - __asm__ volatile("llzrgf %%r6, %0\n" - "st %%r6, %1\n" - : - : "g"(testedValue), "g"(after)); + uint32_t expected = testedValue & 0xffffff00; + __asm__ volatile("llzrgf %0, %1" : "=d"(after) : "T"(testedValue) : ); SMART_RETURN_R64(llzrgf); } @@ -159,24 +148,23 @@ static bool test_llzrgf(const uint32_t testedValue) __asm__ volatile( \ "cr %[testedValue], %[invertedValue]\n" #TESTED_INSTRUCTION \ " %[after], %[overrideValue]\n" \ - : [after] "=r"(after) \ - : [testedValue] "r"(testedValue), \ - [invertedValue] "r"(invertedValue), \ - [overrideValue] #ARGUMENT_ASM_TYPE(overrideValue), \ - "[after]"(after) \ + : [after] "+d"(after) \ + : [testedValue] "d"(testedValue), \ + [invertedValue] "d"(invertedValue), \ + [overrideValue] #ARGUMENT_ASM_TYPE(overrideValue) \ : "cc"); \ \ SMART_RETURN_R64(TESTED_INSTRUCTION); \ } -declare_load_high_on_condition(locfhre, ==, r) -declare_load_high_on_condition(locfhrne, !=, r) -declare_load_high_on_condition(locfhrh, >, r) -declare_load_high_on_condition(locfhrl, <, r) -declare_load_high_on_condition(locfhe, ==, m) -declare_load_high_on_condition(locfhne, !=, m) -declare_load_high_on_condition(locfhh, >, m) -declare_load_high_on_condition(locfhl, <, m) +declare_load_high_on_condition(locfhre, ==, d) +declare_load_high_on_condition(locfhrne, !=, d) +declare_load_high_on_condition(locfhrh, >, d) +declare_load_high_on_condition(locfhrl, <, d) +declare_load_high_on_condition(locfhe, ==, Q) +declare_load_high_on_condition(locfhne, !=, Q) +declare_load_high_on_condition(locfhh, >, Q) +declare_load_high_on_condition(locfhl, <, Q) /* store high on condition */ #define declare_store_high_on_condition(TESTED_INSTRUCTION, CONDITION_SYMBOL, \ @@ -197,19 +185,19 @@ declare_load_high_on_condition(locfhl, <, m) __asm__ volatile( \ "cr %[testedValue], %[invertedValue]\n" #TESTED_INSTRUCTION \ " %[overrideValue], %[after]\n" \ - : [after] "=" #ARGUMENT_ASM_TYPE(after) \ - : [testedValue] "r"(testedValue), \ - [invertedValue] "r"(invertedValue), \ - [overrideValue] "r"(overrideValue) \ + : [after] "+" #ARGUMENT_ASM_TYPE(after) \ + : [testedValue] "d"(testedValue), \ + [invertedValue] "d"(invertedValue), \ + [overrideValue] "d"(overrideValue) \ : "cc"); \ \ SMART_RETURN_R64(TESTED_INSTRUCTION); \ } -declare_store_high_on_condition(stocfhe, ==, m) -declare_store_high_on_condition(stocfhne, !=, m) -declare_store_high_on_condition(stocfhh, >, m) -declare_store_high_on_condition(stocfhl, <, m) +declare_store_high_on_condition(stocfhe, ==, Q) +declare_store_high_on_condition(stocfhne, !=, Q) +declare_store_high_on_condition(stocfhh, >, Q) +declare_store_high_on_condition(stocfhl, <, Q) #define __format_uint32_t "%x" #define __format_uint64_t "%lx" @@ -234,10 +222,9 @@ declare_store_high_on_condition(stocfhl, <, m) __asm__ volatile( \ "cr %[testedValue], %[invertedValue]\n" #TESTED_INSTRUCTION \ " %[after], " IMMEDIATE_VALUE_STR "\n" \ - : [after] "=r"(after) \ - : [testedValue] "r"(testedValue), \ - [invertedValue] "r"(invertedValue), \ - "[after]"(after) \ + : [after] "+d"(after) \ + : [testedValue] "d"(testedValue), \ + [invertedValue] "d"(invertedValue) \ : "cc"); \ \ SMART_RETURN_R64(TESTED_INSTRUCTION); \ @@ -273,10 +260,9 @@ declare_load_halfword_immediate_on_condition(locghil, uint64_t, <, r) __asm__ volatile( \ "cr %[testedValue], %[invertedValue]\n" #TESTED_INSTRUCTION \ " %[after], " IMMEDIATE_VALUE_STR "\n" \ - : [after] "=r"(after) \ - : [testedValue] "r"(testedValue), \ - [invertedValue] "r"(invertedValue), \ - "[after]"(after) \ + : [after] "+d"(after) \ + : [testedValue] "d"(testedValue), \ + [invertedValue] "d"(invertedValue) \ : "cc"); \ \ SMART_RETURN_R64(TESTED_INSTRUCTION); \ @@ -306,7 +292,7 @@ static void test_all_locfh() #define declare_load_count_to_block_boundary(M_FIELD) \ bool test_lcbb##M_FIELD(const uint32_t testedValue) \ { \ - const size_t boundary = 64 * pow(2, M_FIELD); \ + const size_t boundary = 64 * (1UL << (M_FIELD)); \ const uint32_t *testedPointer = \ (uint32_t *)(boundary - \ ((testedValue < boundary) ? testedValue : 0)); \ @@ -317,8 +303,8 @@ static void test_all_locfh() \ __asm__ volatile("lcbb %[after], %[testedPointer], " #M_FIELD \ "\n" \ - : [after] "=r"(after) \ - : [testedPointer] "m"(*testedPointer) \ + : [after] "=d"(after) \ + : [testedPointer] "R"(*testedPointer) \ : "cc"); \ \ SMART_RETURN_R64(lcbb##M_FIELD); \ @@ -346,7 +332,7 @@ static bool test_lcbb0_cc(const uint32_t testedValue) "ipm %[cc] \n" "srl %[cc], 28 \n" : [cc] "=d"(after) - : [testedPointer] "m"(*testedPointer) + : [testedPointer] "R"(*testedPointer) : "cc"); SMART_RETURN_R64(lcbb0_cc); } diff --git a/none/tests/s390x/misc3.c b/none/tests/s390x/misc3.c index fbf4cae682..eeeea1163c 100644 --- a/none/tests/s390x/misc3.c +++ b/none/tests/s390x/misc3.c @@ -142,13 +142,13 @@ static void test_all_select() /* -- Move right to left -- */ -static void test_mvcrl(void *to, void *from, size_t len) +static void test_mvcrl(char *to, char *from, size_t len) { len -= 1; __asm__("lgr 0,%[len]\n\t" ".insn sse,0xe50a00000000,%[to],%[from]\n\t" - : [to] "+Q" (*(struct { char c[len]; } *) to) - : [from] "Q" (*(struct { char c[len]; } *) from), + : [to] "+Q" (*(char (*)[len]) to) + : [from] "Q" (*(char (*)[len]) from), [len] "d" (len) : ); } diff --git a/none/tests/s390x/test_sig.c b/none/tests/s390x/test_sig.c index 74049312f0..b24dbbe106 100644 --- a/none/tests/s390x/test_sig.c +++ b/none/tests/s390x/test_sig.c @@ -8,6 +8,12 @@ #include #include +/* Circumvent bad assembly in system header, so Clang doesn't complain */ +#undef _FPU_SETCW +#define _FPU_SETCW(cw) __asm__ __volatile__ ("sfpc %0" : : "d" (cw)) +#undef _FPU_GETCW +#define _FPU_GETCW(cw) __asm__ __volatile__ ("efpc %0" : "=d" (cw)) + void handle_SIG(int sig) { double d; diff --git a/none/tests/s390x/tre.c b/none/tests/s390x/tre.c index da0e38d3e0..764bfa3114 100644 --- a/none/tests/s390x/tre.c +++ b/none/tests/s390x/tre.c @@ -30,8 +30,8 @@ tre_regs tre(uint8_t *codepage, uint8_t *addr, uint64_t len, uint8_t test_byte) " tre %1,%2\n" " ipm %0\n" " srl %0,28\n" - :"=d"(cc),"+&d"(a1) - :"d"(a2),"d"(param),"d"(l1),"d"(test_byte): "cc", "memory" ); + : "=d"(cc), "+a"(a1), "+a"(a2), "+a"(l1), "+d"(param) + : : "cc", "memory"); regs.addr = a1; regs.len = l1; diff --git a/none/tests/s390x/troo.c b/none/tests/s390x/troo.c index f62ad0d057..3c81c05a76 100644 --- a/none/tests/s390x/troo.c +++ b/none/tests/s390x/troo.c @@ -13,7 +13,7 @@ typedef struct { uint64_t cc; } troo_regs; -uint8_t tran_table[20] = { +uint8_t tran_table[20] __attribute__((aligned(8))) = { 0xaa,0xbb,0xcc,0xdd,0xff,0xda,0xbc,0xab,0xca,0xea,0xcc,0xee }; @@ -39,9 +39,9 @@ troo_regs tr(uint8_t *addr, uint8_t *codepage, uint8_t *dest, uint64_t len, " troo %1,%2\n" " ipm %0\n" " srl %0,28\n" - : "=d"(cc),"+&d"(desaddr) - : "d" (srcaddr),"d"(test_byte),"d" (codepage2),"d"(length) - : "cc", "memory" ); + : "=d"(cc), "+a"(desaddr), + "+a"(srcaddr), "+d"(test_byte), "+a"(codepage2), "+a"(length) + : : "cc", "memory" ); regs.srcaddr = srcaddr; regs.len = length; diff --git a/none/tests/s390x/trot.c b/none/tests/s390x/trot.c index 76072c0277..b2a3036fd4 100644 --- a/none/tests/s390x/trot.c +++ b/none/tests/s390x/trot.c @@ -13,7 +13,7 @@ typedef struct { uint64_t cc; } trot_regs; -uint16_t tran_table[40] = { +uint16_t tran_table[40] __attribute__((aligned(8))) = { 0xaaaa,0xbbbb,0xcccc,0xccdd,0xffff,0xdada,0xbcbc,0xabab,0xcaca,0xeaea, 0xbbbb,0xeeee }; @@ -40,9 +40,9 @@ trot_regs tr(uint8_t *addr, uint16_t *codepage, uint16_t *dest, uint64_t len, " trot %1,%2\n" " ipm %0\n" " srl %0,28\n" - : "=d"(cc),"+&d"(desaddr) - : "d" (srcaddr),"d"(test_byte),"d" (codepage2),"d"(length) - : "cc", "memory" ); + : "=d"(cc), "+a"(desaddr), + "+a"(srcaddr), "+d"(test_byte), "+a"(codepage2), "+a"(length) + : : "cc", "memory" ); regs.srcaddr = srcaddr; regs.len = length; diff --git a/none/tests/s390x/trto.c b/none/tests/s390x/trto.c index f8ff97645a..70fdcd318b 100644 --- a/none/tests/s390x/trto.c +++ b/none/tests/s390x/trto.c @@ -13,7 +13,7 @@ typedef struct { uint64_t cc; } trto_regs; -uint8_t tran_table[40] = { +uint8_t tran_table[40] __attribute__((aligned(8))) = { 0xaa,0xbb,0xcc,0xdd,0xff,0xdd,0xbc,0xab,0xca,0xea,0xbb,0xee }; @@ -39,9 +39,9 @@ trto_regs tr(uint16_t *addr, uint16_t *codepage, uint8_t *dest, uint64_t len, " trto %1,%2\n" " ipm %0\n" " srl %0,28\n" - : "=d"(cc),"+&d"(desaddr) - : "d" (srcaddr),"d"(test_byte),"d" (codepage2),"d"(length) - : "cc", "memory" ); + : "=d"(cc), "+a"(desaddr), + "+a"(srcaddr), "+d"(test_byte), "+a"(codepage2), "+a"(length) + : : "cc", "memory" ); regs.srcaddr = srcaddr; regs.len = length; diff --git a/none/tests/s390x/trtt.c b/none/tests/s390x/trtt.c index c59c6416e6..cc99d5a183 100644 --- a/none/tests/s390x/trtt.c +++ b/none/tests/s390x/trtt.c @@ -13,7 +13,7 @@ typedef struct { uint64_t cc; } trtt_regs; -uint16_t tran_table[40] = { +uint16_t tran_table[40] __attribute__((aligned(8))) = { 0xaaaa,0xcccc,0xcccc,0xdddd,0xffff,0xdada,0xbcbc,0xabab,0xcaca,0xeaea, 0xbbbb,0xeeee }; @@ -40,9 +40,9 @@ trtt_regs tr(uint16_t *addr, uint16_t *codepage, uint16_t *dest, uint64_t len, " trtt %1,%2\n" " ipm %0\n" " srl %0,28\n" - : "=d"(cc),"+d"(desaddr),"+d"(srcaddr) - : "d"(test_byte),"d" (codepage2),"d"(length) - : "cc", "memory" ); + : "=d"(cc), "+a"(desaddr), + "+a"(srcaddr), "+d"(test_byte), "+a"(codepage2), "+a"(length) + : : "cc", "memory" ); regs.srcaddr = srcaddr; regs.len = length; diff --git a/none/tests/s390x/vector.c b/none/tests/s390x/vector.c index 5f4f9ab55c..3d2951a3a0 100644 --- a/none/tests/s390x/vector.c +++ b/none/tests/s390x/vector.c @@ -24,10 +24,10 @@ s390_test_generate(vlei_neg, "vleib %%v5, -0x091a, 14\n" \ "vleif %%v5, -0x1ccc, 2\n" \ "vleig %%v5, -0x1ddd, 0") -s390_test_generate(vlvg, "vlvgb %[r_arg1], %%v1, 12(0)\n" \ - "vlvgh %[r_arg2], %%v2, 6(0)\n" \ - "vlvgf %[r_arg3], %%v3, 2(0)\n" \ - "vlvgg %[r_arg1], %%v5, 1(0)") +s390_test_generate(vlvg, "vlvgb %%v1, %[r_arg1], 12(0)\n" \ + "vlvgh %%v2, %[r_arg2], 6(0)\n" \ + "vlvgf %%v3, %[r_arg3], 2(0)\n" \ + "vlvgg %%v5, %[r_arg1], 1(0)") s390_test_generate(vgbm, "vgbm %%v1, 0xf00f \n" \ "vzero %%v2 \n" \ diff --git a/none/tests/s390x/vector.h b/none/tests/s390x/vector.h index c4d188afd4..b19c3465f5 100644 --- a/none/tests/s390x/vector.h +++ b/none/tests/s390x/vector.h @@ -267,23 +267,20 @@ static void test_##insn##_selective(const s390x_test_usageInfo info) \ "vst %%v1, %[v_arg1]\n" \ "vst %%v2, %[v_arg2]\n" \ "vst %%v3, %[v_arg3]\n" \ - : [v_result] "=m" (current.v_result), \ - [m_result] "=m" (current.r_result), \ + : [v_result] "+R" (current.v_result), \ [r_result] "+d" (current.r_result), \ - [r_arg1] "+d" (current.r_arg[0]), \ - [r_arg2] "+d" (current.r_arg[1]), \ - [r_arg3] "+d" (current.r_arg[2]) \ - : [v_arg1] "m" (current.v_arg[0]), \ - [v_arg2] "m" (current.v_arg[1]), \ - [v_arg3] "m" (current.v_arg[2]), \ - [m_arg1] "m" (current.r_arg[0]), \ - [m_arg2] "m" (current.r_arg[1]), \ - [m_arg3] "m" (current.r_arg[2]), \ - [r_memory_pool] "r" (random_memory_pool), \ - [m_memory_pool] "m" (random_memory_pool) \ - : "memory", "cc", \ - "r1", "r2", "r3", "r5", \ - "v1", "v2", "v3", "v5"); \ + [r_arg1] "+a" (current.r_arg[0]), \ + [r_arg2] "+a" (current.r_arg[1]), \ + [r_arg3] "+a" (current.r_arg[2]), \ + [v_arg1] "+R" (current.v_arg[0]), \ + [v_arg2] "+R" (current.v_arg[1]), \ + [v_arg3] "+R" (current.v_arg[2]) \ + : [m_arg1] "R" (current.r_arg[0]), \ + [m_arg2] "R" (current.r_arg[1]), \ + [m_arg3] "R" (current.r_arg[2]), \ + [r_memory_pool] "d" (random_memory_pool), \ + [m_memory_pool] "R" (random_memory_pool) \ + : "cc", "v1", "v2", "v3", "v5"); \ \ printf("insn %s:\n", #insn); \ print_results(info, &orig, ¤t); \ diff --git a/none/tests/s390x/vector.stdout.exp b/none/tests/s390x/vector.stdout.exp index e61a3bfa43..b5893bea96 100644 --- a/none/tests/s390x/vector.stdout.exp +++ b/none/tests/s390x/vector.stdout.exp @@ -434,34 +434,64 @@ insn vlvgp: v_result = ffffffffffffffff | ffffffffffffffff r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 1f427f7cf88382ba | 2cad200d9509e187 + v_arg2 = 20acc9022764afbe | 418aefdf62c385cb + v_arg3 = db227d67146fd038 | 8e6312496b5f976f + v_result = ffffffffffffffff | 471361c45f8bde95 r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 70194b4fd7874ba9 | e57be5f776e3b5c6 + v_arg2 = 8c153e6a1a7d0156 | e22ff15d10b04cd1 + v_arg3 = 2863ce806c7f4b91 | c3df7aa12322078c + v_result = ffffffffffffffff | 472c4d408f223176 r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 34768342275bf3a3 | 4e46db2717824050 + v_arg2 = cbdffee0732097f5 | 1e496d0d11a45adb + v_arg3 = 3e99a00d380a45e7 | 9742e1833e0e275e + v_result = ffffffffffffffff | e87bdd944cfba217 r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = e5fe25f6d59ca39b | f61204d1a2c21186 + v_arg2 = 422ed2e3cc26252c | f1d8b47d02f54a65 + v_arg3 = 7063896bbc270064 | 40acc93377789e7d + v_result = ffffffffffffffff | e20a7c3da279a8a2 r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = c4a86410f4151a62 | f5f25be4de6d0b66 + v_arg2 = 9ef13972631676e7 | 5d6a8b7995588c0b + v_arg3 = d5ae53f363175313 | 5daa8a166f9f6620 + v_result = ffffffffffffffff | 73f68c7083ee0fde r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 96756aee7d806d67 | a5c590cef0f92a4e + v_arg2 = 90a72ac9dde52c31 | 2bdcedcb53a02745 + v_arg3 = 0e74c2bd800d6a99 | b1f9136a6e7495dc + v_result = ffffffffffffffff | 202624e58458b9f0 r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 6735176f0f45c578 | 6afcc73a1a4c3eb8 + v_arg2 = 921dd02006b87bf3 | a819cdfa5b7f782a + v_arg3 = fc7c4c6008e888fc | e441aa1120531165 + v_result = ffffffffffffffff | 7311d38fa326611a r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 4b47c1aeb038257e | 6c515dd47e7aaffd + v_arg2 = a12d4e718fa0f2b3 | 6ad8d20e2242f230 + v_arg3 = 8b1fdfae5af5c55f | 46d9a8465aca5a4a + v_result = ffffffffffffffff | bb7b5c6004f3537e r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 1858f3c58a5d2143 | 598fa302db843814 + v_arg2 = 027f7932ce5b3358 | 096119493297dce9 + v_arg3 = 6c009f7bf8b1d1c2 | 8b883e64d35045bc + v_result = ffffffffffffffff | cf367809af4836db r_result = 0000000000000000 insn vlvg: - v_result = ffffffffffffffff | ffffffffffffffff + v_arg1 = 2e212f8dafa6a92d | 2450a2ab4d1aac53 + v_arg2 = fe49a1158218b7e3 | e747f7edeb4a16c6 + v_arg3 = d3d2a6564c84afc5 | 904134a4ec0dbb47 + v_result = ffffffffffffffff | cce497b6545ec34d r_result = 0000000000000000 insn vmrhb: v_result = 31a62c11ac495bce | d68eb232bd8c0335 diff --git a/none/tests/s390x/vector_integer.stdout.exp b/none/tests/s390x/vector_integer.stdout.exp index b06df2f709..2a1378f5c2 100644 --- a/none/tests/s390x/vector_integer.stdout.exp +++ b/none/tests/s390x/vector_integer.stdout.exp @@ -1115,16 +1115,16 @@ insn veslb: v_result = 74940c700490c8ac | 7814509cb8a8e804 r_result = 0000000000000000 insn veslh: - v_result = f4182a3065c03910 | cd88f0b88028e510 + v_result = 0c001800e0008800 | c4005c0014008800 r_result = 0000000000000000 insn veslh: - v_result = 205858a06b58b518 | d798a34027489d10 + v_result = 40b0b140d6b06a30 | af3046804e903a20 r_result = 0000000000000000 insn veslh: - v_result = 79c0b2f0af685eb0 | b918f3f8842096b0 + v_result = 9c002f00f680eb00 | 91803f8042006b00 r_result = 0000000000000000 insn veslh: - v_result = 1090ffd0daf84800 | 4738d01013a00178 + v_result = 9000d000f8000000 | 38001000a0007800 r_result = 0000000000000000 insn veslf: v_result = 683054fd9c4d4883 | 0f345c90ed85bd7f @@ -1211,16 +1211,16 @@ insn vesrab: v_result = 0000000000ff00ff | ff00ffff000000ff r_result = 0000000000000000 insn vesrah: - v_result = 0bc0035efcfe092f | f1200853f8c0023a + v_result = 00020000ffff0002 | fffc0002fffe0000 r_result = 0000000000000000 insn vesrah: - v_result = 09580821f638fe80 | 08d70ff40b030d25 + v_result = 02560208fd8effa0 | 023503fd02c00349 r_result = 0000000000000000 insn vesrah: - v_result = f80af07004ee0b5f | 0c69f8c2053803e7 + v_result = fc05f838027705af | 0634fc61029c01f3 r_result = 0000000000000000 insn vesrah: - v_result = f4900b3c083bf80d | 0383faa9fca90374 + v_result = e92016781077f01b | 0707f553f95206e9 r_result = 0000000000000000 insn vesraf: v_result = fffffff800000017 | 0000001b00000018 @@ -1307,16 +1307,16 @@ insn vesrlb: v_result = 3376472e4c18604e | 4d16787d677a704a r_result = 0000000000000000 insn vesrlh: - v_result = 148b04a4013c1425 | 03fc1b8c104d1765 + v_result = 0002000000000002 | 0000000300020002 r_result = 0000000000000000 insn vesrlh: - v_result = 06a11d88135108f0 | 1ef9041c16501ab3 + v_result = 03500ec409a80478 | 0f7c020e0b280d59 r_result = 0000000000000000 insn vesrlh: - v_result = 0ed80cb30be41400 | 02af188d0cfd0067 + v_result = 0000000000000001 | 0000000100000000 r_result = 0000000000000000 insn vesrlh: - v_result = 019f191101a815af | 0ea408a201b91daf + v_result = 00190191001a015a | 00ea008a001b01da r_result = 0000000000000000 insn vesrlf: v_result = 0000506d00006180 | 00006b1500001cb1 @@ -1403,16 +1403,16 @@ insn verllb: v_result = cf1b17657aeda68c | 0657478664785bab r_result = 0000000000000000 insn verllh: - v_result = 8bd1365783de79f0 | da956b0f21fddcc9 + v_result = 462f5cd97a0fc1e7 | 576a3dacf4872773 r_result = 0000000000000000 insn verllh: - v_result = 3f1175c0561f88eb | 7173b8ef9891bf0e + v_result = 4fc41d70d587e23a | dc5cee3b6624afc3 r_result = 0000000000000000 insn verllh: - v_result = 9bcff5ebe02ddf43 | 7612bbcd5834e6b1 + v_result = 79f3bd7e05bce87b | c24e79b7068bd63c r_result = 0000000000000000 insn verllh: - v_result = d4476f71fcfd811f | afa862d3e7cea55e + v_result = 23eab8b77efe8fc0 | d45769b1e773af52 r_result = 0000000000000000 insn verllf: v_result = 79226829d81a5cb3 | fea1e8903de71c9e diff --git a/none/tests/s390x/xc.c b/none/tests/s390x/xc.c index 86dda352d6..cbf6f7c66e 100644 --- a/none/tests/s390x/xc.c +++ b/none/tests/s390x/xc.c @@ -2,6 +2,10 @@ #include #include "test.h" +#define OC_INSN(len,args) ".insn sse,0xd6" len "00000000," args +#define NC_INSN(len,args) ".insn sse,0xd4" len "00000000," args +#define XC_INSN(len,args) ".insn sse,0xd7" len "00000000," args + void test_oc(void) { char buf1[20] = "UUUUU*UUU****U*\0\0\0\0\n"; @@ -9,13 +13,11 @@ void test_oc(void) char zero[2] = "\0\0"; printf("\nOC:\n"); - asm volatile ("oc %O0(1,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (OC_INSN("00","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 2); - asm volatile ("oc %O0(19,%R0),%1\n"::"Q" (*buf1), - "Q"(*buf2):"memory"); + asm volatile (OC_INSN("12","%0,%1") : "=Q"(*buf1) : "Q"(*buf2) : "cc"); printf("CC:%d\n", get_cc()); dump_field(buf1, 20); } @@ -27,13 +29,11 @@ void test_nc(void) char zero[2] = "\0\0"; printf("\nNC:\n"); - asm volatile ("nc %O0(1,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (NC_INSN("01","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 2); - asm volatile ("nc %O0(19,%R0),%1\n"::"Q" (*buf1), - "Q"(*buf2):"cc","memory"); + asm volatile (NC_INSN("13","%0,%1") : "=Q"(*buf1) : "Q"(*buf2) : "cc"); printf("CC:%d\n", get_cc()); dump_field(buf1, 20); } @@ -53,23 +53,19 @@ void test_xc(void) "aaaaa"; printf("\nXC:\n"); - asm volatile ("xc %O0(1,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (XC_INSN("00","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 4); - asm volatile ("xc %O0(10,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (XC_INSN("09","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 12); - asm volatile ("xc %O0(100,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (XC_INSN("63","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 102); - asm volatile ("xc %O0(256,%R0),%0\n"::"Q" (*zero), - "Q"(*zero):"cc","memory"); + asm volatile (XC_INSN("ff","%0,%0") : "+Q"(*zero) : : "cc"); printf("CC:%d\n", get_cc()); dump_field(zero, 257);