From: liuhongt <hongtao.liu@intel.com>
Date: Tue, 14 Dec 2021 01:47:08 +0000 (+0800)
Subject: Fix ICE. [PR103682]
X-Git-Tag: basepoints/gcc-13~2332
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a2a0c91b47537b16908981e206f4e42db8425eca;p=thirdparty%2Fgcc.git

Fix ICE. [PR103682]

Check is_gimple_assign before gimple_assign_rhs_code.

gcc/ChangeLog:

	PR target/103682
	* tree-ssa-ccp.c (optimize_atomic_bit_test_and): Check
	is_gimple_assign before gimple_assign_rhs_code.

gcc/testsuite/ChangeLog:

	* gcc.c-torture/compile/pr103682.c: New test.
---

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr103682.c b/gcc/testsuite/gcc.c-torture/compile/pr103682.c
new file mode 100644
index 000000000000..5ee4b21f7e62
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr103682.c
@@ -0,0 +1,3 @@
+int bug(unsigned *ready, unsigned u) {
+  return __atomic_fetch_and (ready, ~u, 0) & u;
+}
diff --git a/gcc/tree-ssa-ccp.c b/gcc/tree-ssa-ccp.c
index 9e12da8f011a..a5b1f60f9797 100644
--- a/gcc/tree-ssa-ccp.c
+++ b/gcc/tree-ssa-ccp.c
@@ -3703,8 +3703,8 @@ optimize_atomic_bit_test_and (gimple_stmt_iterator *gsip,
 	      g = SSA_NAME_DEF_STMT (mask);
 	    }
 
-	  rhs_code = gimple_assign_rhs_code (g);
-	  if (rhs_code != LSHIFT_EXPR
+	  if (!is_gimple_assign (g)
+	      || gimple_assign_rhs_code (g) != LSHIFT_EXPR
 	      || !integer_onep (gimple_assign_rhs1 (g)))
 	    return;
 	  bit = gimple_assign_rhs2 (g);