From: Michael Walle Date: Fri, 17 Oct 2025 10:22:22 +0000 (+0200) Subject: arm64: dts: ti: k3-j722s-main: fix the audio refclk source X-Git-Tag: v6.19-rc1~100^2~18^2~36 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a3a74f9b15f020952a4c9e4eb3a0b44241827b73;p=thirdparty%2Fkernel%2Flinux.git arm64: dts: ti: k3-j722s-main: fix the audio refclk source At the moment the clock parent of the audio extclk output is PLL1_HSDIV6 of the main domain. This very clock output is also used among various IP cores, for example for the USB1 LPM clock. The audio extclock being an external clock output with a variable frequency, it is likely that a user of this clock will try to set it's frequency to a different value, i.e. an audio codec. Because that clock output is used also for other IP cores, bad things will happen. Instead of using PLL1_HSDIV6 use the PLL2_HSDIV8 as a sane default, as this output is exclusively used among other audio peripherals. Signed-off-by: Michael Walle Link: https://patch.msgid.link/20251017102228.530517-2-mwalle@kernel.org Signed-off-by: Vignesh Raghavendra --- diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi index d57fdd38bdceb..7b7c25c2c6d9b 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi @@ -443,7 +443,7 @@ reg = <0x82e0 0x4>; clocks = <&k3_clks 157 0>; assigned-clocks = <&k3_clks 157 0>; - assigned-clock-parents = <&k3_clks 157 15>; + assigned-clock-parents = <&k3_clks 157 16>; #clock-cells = <0>; }; @@ -452,7 +452,7 @@ reg = <0x82e4 0x4>; clocks = <&k3_clks 157 18>; assigned-clocks = <&k3_clks 157 18>; - assigned-clock-parents = <&k3_clks 157 33>; + assigned-clock-parents = <&k3_clks 157 34>; #clock-cells = <0>; }; };