From: Jeff Law <jlaw@ventanamicro.com>
Date: Wed, 19 Nov 2025 13:34:33 +0000 (-0700)
Subject: [RISC-V] Fix trivial bootstrap failure on RISC-V
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a3e97daf1f7452d060d2e5e4eb2fea7717343f18;p=thirdparty%2Fgcc.git

[RISC-V] Fix trivial bootstrap failure on RISC-V

Trivial bootstrap fix for the RISC-V port where a recent change introduced a
signed vs unsigned warning.

gcc/
	* config/riscv/riscv-string.cc (riscv_expand_block_move_scalar):
	Fix signed vs unsigned warning.
---

diff --git a/gcc/config/riscv/riscv-string.cc b/gcc/config/riscv/riscv-string.cc
index 2d662b4ce49..c5710e4c896 100644
--- a/gcc/config/riscv/riscv-string.cc
+++ b/gcc/config/riscv/riscv-string.cc
@@ -924,7 +924,7 @@ riscv_expand_block_move_scalar (rtx dest, rtx src, rtx length)
   unsigned HOST_WIDE_INT factor, align;
 
   if (riscv_memcpy_size_threshold >= 0
-      && hwi_length > riscv_memcpy_size_threshold)
+      && hwi_length > (unsigned HOST_WIDE_INT) riscv_memcpy_size_threshold)
     return false;
 
   if (riscv_slow_unaligned_access_p)