From: Suman Kumar Chakraborty Date: Tue, 1 Jul 2025 09:47:29 +0000 (+0100) Subject: crypto: qat - relocate and rename bank state structure definition X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a47dc5d1a6e2342e7725c6c592800d49b7276b7a;p=thirdparty%2Flinux.git crypto: qat - relocate and rename bank state structure definition The `bank_state` structure represents the state of a bank of rings. As part of recent refactoring, the functions that interact with this structure have been moved to a new unit, adf_bank_state.c. To align with this reorganization, rename `struct bank_state` to `struct adf_bank_state` and move its definition to adf_bank_state.h. Also relocate the associated `struct ring_config` to the same header to consolidate related definitions. Update all references to use the new structure name. This does not introduce any functional change. Signed-off-by: Suman Kumar Chakraborty Signed-off-by: Herbert Xu --- diff --git a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h index 2ee5260632133..f76e0f6c66aed 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/intel/qat/qat_common/adf_accel_devices.h @@ -157,39 +157,7 @@ struct admin_info { u32 mailbox_offset; }; -struct ring_config { - u64 base; - u32 config; - u32 head; - u32 tail; - u32 reserved0; -}; - -struct bank_state { - u32 ringstat0; - u32 ringstat1; - u32 ringuostat; - u32 ringestat; - u32 ringnestat; - u32 ringnfstat; - u32 ringfstat; - u32 ringcstat0; - u32 ringcstat1; - u32 ringcstat2; - u32 ringcstat3; - u32 iaintflagen; - u32 iaintflagreg; - u32 iaintflagsrcsel0; - u32 iaintflagsrcsel1; - u32 iaintcolen; - u32 iaintcolctl; - u32 iaintflagandcolen; - u32 ringexpstat; - u32 ringexpintenable; - u32 ringsrvarben; - u32 reserved0; - struct ring_config rings[ADF_ETR_MAX_RINGS_PER_BANK]; -}; +struct adf_bank_state; struct adf_hw_csr_ops { u64 (*build_csr_ring_base_addr)(dma_addr_t addr, u32 size); @@ -338,9 +306,9 @@ struct adf_hw_device_data { void (*set_ssm_wdtimer)(struct adf_accel_dev *accel_dev); int (*ring_pair_reset)(struct adf_accel_dev *accel_dev, u32 bank_nr); int (*bank_state_save)(struct adf_accel_dev *accel_dev, u32 bank_number, - struct bank_state *state); + struct adf_bank_state *state); int (*bank_state_restore)(struct adf_accel_dev *accel_dev, - u32 bank_number, struct bank_state *state); + u32 bank_number, struct adf_bank_state *state); void (*reset_device)(struct adf_accel_dev *accel_dev); void (*set_msix_rttable)(struct adf_accel_dev *accel_dev); const char *(*uof_get_name)(struct adf_accel_dev *accel_dev, u32 obj_num); diff --git a/drivers/crypto/intel/qat/qat_common/adf_bank_state.c b/drivers/crypto/intel/qat/qat_common/adf_bank_state.c index 2a0bbee8a288d..225d55d56a4ba 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_bank_state.c +++ b/drivers/crypto/intel/qat/qat_common/adf_bank_state.c @@ -30,7 +30,7 @@ static inline int check_stat(u32 (*op)(void __iomem *, u32), u32 expect_val, } static void bank_state_save(struct adf_hw_csr_ops *ops, void __iomem *base, - u32 bank, struct bank_state *state, u32 num_rings) + u32 bank, struct adf_bank_state *state, u32 num_rings) { u32 i; @@ -60,7 +60,7 @@ static void bank_state_save(struct adf_hw_csr_ops *ops, void __iomem *base, } static int bank_state_restore(struct adf_hw_csr_ops *ops, void __iomem *base, - u32 bank, struct bank_state *state, u32 num_rings, + u32 bank, struct adf_bank_state *state, u32 num_rings, int tx_rx_gap) { u32 val, tmp_val, i; @@ -185,7 +185,7 @@ static int bank_state_restore(struct adf_hw_csr_ops *ops, void __iomem *base, * Returns 0 on success, error code otherwise */ int adf_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number, - struct bank_state *state) + struct adf_bank_state *state) { struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); @@ -215,7 +215,7 @@ EXPORT_SYMBOL_GPL(adf_bank_state_save); * Returns 0 on success, error code otherwise */ int adf_bank_state_restore(struct adf_accel_dev *accel_dev, u32 bank_number, - struct bank_state *state) + struct adf_bank_state *state) { struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); diff --git a/drivers/crypto/intel/qat/qat_common/adf_bank_state.h b/drivers/crypto/intel/qat/qat_common/adf_bank_state.h index 85b15ed161f45..48b573d692dd7 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_bank_state.h +++ b/drivers/crypto/intel/qat/qat_common/adf_bank_state.h @@ -6,11 +6,44 @@ #include struct adf_accel_dev; -struct bank_state; + +struct ring_config { + u64 base; + u32 config; + u32 head; + u32 tail; + u32 reserved0; +}; + +struct adf_bank_state { + u32 ringstat0; + u32 ringstat1; + u32 ringuostat; + u32 ringestat; + u32 ringnestat; + u32 ringnfstat; + u32 ringfstat; + u32 ringcstat0; + u32 ringcstat1; + u32 ringcstat2; + u32 ringcstat3; + u32 iaintflagen; + u32 iaintflagreg; + u32 iaintflagsrcsel0; + u32 iaintflagsrcsel1; + u32 iaintcolen; + u32 iaintcolctl; + u32 iaintflagandcolen; + u32 ringexpstat; + u32 ringexpintenable; + u32 ringsrvarben; + u32 reserved0; + struct ring_config rings[ADF_ETR_MAX_RINGS_PER_BANK]; +}; int adf_bank_state_restore(struct adf_accel_dev *accel_dev, u32 bank_number, - struct bank_state *state); + struct adf_bank_state *state); int adf_bank_state_save(struct adf_accel_dev *accel_dev, u32 bank_number, - struct bank_state *state); + struct adf_bank_state *state); #endif diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c b/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c index a62eb5e8dbe6a..adb21656a3ba8 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c +++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_vf_mig.c @@ -9,6 +9,7 @@ #include #include "adf_accel_devices.h" +#include "adf_bank_state.h" #include "adf_common_drv.h" #include "adf_gen4_hw_data.h" #include "adf_gen4_pfvf.h" @@ -358,7 +359,7 @@ static int adf_gen4_vfmig_load_etr_regs(struct adf_mstate_mgr *sub_mgr, pf_bank_nr = vf_bank_info->bank_nr + vf_bank_info->vf_nr * hw_data->num_banks_per_vf; ret = hw_data->bank_state_restore(accel_dev, pf_bank_nr, - (struct bank_state *)state); + (struct adf_bank_state *)state); if (ret) { dev_err(&GET_DEV(accel_dev), "Failed to load regs for vf%d bank%d\n", @@ -585,7 +586,7 @@ static int adf_gen4_vfmig_save_etr_regs(struct adf_mstate_mgr *subs, u8 *state, pf_bank_nr += vf_bank_info->vf_nr * hw_data->num_banks_per_vf; ret = hw_data->bank_state_save(accel_dev, pf_bank_nr, - (struct bank_state *)state); + (struct adf_bank_state *)state); if (ret) { dev_err(&GET_DEV(accel_dev), "Failed to save regs for vf%d bank%d\n", @@ -593,7 +594,7 @@ static int adf_gen4_vfmig_save_etr_regs(struct adf_mstate_mgr *subs, u8 *state, return ret; } - return sizeof(struct bank_state); + return sizeof(struct adf_bank_state); } static int adf_gen4_vfmig_save_etr_bank(struct adf_accel_dev *accel_dev,