From: Christoph Stoidner Date: Thu, 7 May 2026 06:20:58 +0000 (+0200) Subject: arm64: dts: freescale: imx{91,93}-phycore-som: Improve USDHC signals X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a6254c90e14b5b9d0b2222b2121598fe12f55ca5;p=thirdparty%2Flinux.git arm64: dts: freescale: imx{91,93}-phycore-som: Improve USDHC signals Apply improved drive-strength values and pull-up/down configurations as devised from hardware measurements to improve signal quality on PHYTEC phyCORE-i.MX 91/93 SoM based boards. Also improve eMMC HS400 mode by setting property "fsl,strobe-dll-delay-target" which shifts the strobe DLL sampling window to the optimal position. Signed-off-by: Christoph Stoidner Signed-off-by: Primoz Fiser Signed-off-by: Frank Li --- diff --git a/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts index 8b19fc17eacd3..022e9c6841efd 100644 --- a/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts +++ b/arch/arm64/boot/dts/freescale/imx91-phyboard-segin.dts @@ -327,7 +327,7 @@ pinctrl_usdhc2_default: usdhc2grp { fsl,pins = < - MX91_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX91_PAD_SD2_CLK__USDHC2_CLK 0x118e MX91_PAD_SD2_CMD__USDHC2_CMD 0x1382 MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x1386 MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e @@ -339,7 +339,7 @@ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX91_PAD_SD2_CLK__USDHC2_CLK 0x159e + MX91_PAD_SD2_CLK__USDHC2_CLK 0x119e MX91_PAD_SD2_CMD__USDHC2_CMD 0x139e MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x138e MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x138e @@ -351,7 +351,7 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX91_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX91_PAD_SD2_CLK__USDHC2_CLK 0x118e MX91_PAD_SD2_CMD__USDHC2_CMD 0x138e MX91_PAD_SD2_DATA0__USDHC2_DATA0 0x139e MX91_PAD_SD2_DATA1__USDHC2_DATA1 0x139e diff --git a/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi index 1d8adfd34e92f..8b8cb3daecbb5 100644 --- a/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx91-phycore-som.dtsi @@ -216,6 +216,7 @@ bus-width = <8>; non-removable; no-1-8-v; + fsl,strobe-dll-delay-target = <1>; status = "okay"; }; @@ -274,7 +275,7 @@ pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX91_PAD_SD1_CLK__USDHC1_CLK 0x179e + MX91_PAD_SD1_CLK__USDHC1_CLK 0x119e MX91_PAD_SD1_CMD__USDHC1_CMD 0x1386 MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x1386 @@ -284,13 +285,13 @@ MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x1386 MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x1386 MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x1386 - MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; }; pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < - MX91_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX91_PAD_SD1_CLK__USDHC1_CLK 0x11be MX91_PAD_SD1_CMD__USDHC1_CMD 0x139e MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x138e MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x139e @@ -300,13 +301,13 @@ MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x139e MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x139e MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x139e - MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; }; pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < - MX91_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX91_PAD_SD1_CLK__USDHC1_CLK 0x11be MX91_PAD_SD1_CMD__USDHC1_CMD 0x139e MX91_PAD_SD1_DATA0__USDHC1_DATA0 0x139e MX91_PAD_SD1_DATA1__USDHC1_DATA1 0x13be @@ -316,7 +317,7 @@ MX91_PAD_SD1_DATA5__USDHC1_DATA5 0x13be MX91_PAD_SD1_DATA6__USDHC1_DATA6 0x13be MX91_PAD_SD1_DATA7__USDHC1_DATA7 0x13be - MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX91_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; }; diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts index b82192f25498f..f868ed5c2c291 100644 --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-nash.dts @@ -370,8 +370,8 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_default: usdhc2grp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e - MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000178e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x119e + MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001386 MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001386 MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001386 @@ -383,7 +383,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x119e MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e @@ -396,7 +396,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x119e MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts index 4e4356397ba0a..d929aa9ff255a 100644 --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts @@ -328,7 +328,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_default: usdhc2grp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x119e MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e @@ -341,7 +341,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x159e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x119e MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e @@ -354,7 +354,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < - MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e + MX93_PAD_SD2_CLK__USDHC2_CLK 0x118e MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000139e MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000139e MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000139e diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi index 5148101def316..325e465d00568 100644 --- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi @@ -218,6 +218,7 @@ bus-width = <8>; non-removable; no-1-8-v; + fsl,strobe-dll-delay-target = <1>; status = "okay"; }; @@ -277,7 +278,7 @@ /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc1: usdhc1grp { fsl,pins = < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x179e + MX93_PAD_SD1_CLK__USDHC1_CLK 0x119e MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001386 MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001386 @@ -287,14 +288,14 @@ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001386 MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001386 MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001386 - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; }; /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins = < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX93_PAD_SD1_CLK__USDHC1_CLK 0x11be MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000139e @@ -304,14 +305,14 @@ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000139e MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000139e MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000139e - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; }; /* need to config the SION for data and cmd pad, refer to ERR052021 */ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins = < - MX93_PAD_SD1_CLK__USDHC1_CLK 0x17be + MX93_PAD_SD1_CLK__USDHC1_CLK 0x11be MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000139e MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000139e MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x400013be @@ -321,7 +322,7 @@ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x400013be MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x400013be MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x400013be - MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x179e + MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x159e >; };