From: Fabrizio Castro Date: Thu, 14 May 2026 21:02:17 +0000 (+0100) Subject: arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a6c4c7114b5b4ffe3685fe26002eccd40eb11f3c;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins The HW user manual for the Renesas RZ/T2H and the RZ/N2H states that for SDR104, SDR50, and HS200 to work properly the eMMC/SDHI interface pins have to be configured as specified below: - SDn_CLK pin - drive strength: Ultra High, slew rate: Fast, - Other SDn_* pins: drive strength: High, slew rate: Fast, Schmitt trigger: disabled (not applicable to SDn_RST pins). HS DDR and DDR50 are currently not supported, and for every other bus mode the eMMC/SDHI interface pins should be configured as specified below: - SDn_CLK pin - drive strength: High, slew rate: Fast, - Other SDn_* pins: drive strength: Middle, slew rate: Fast, Schmitt trigger: disabled (not applicable to SDn_RST pins). Adjust the pin definitions accordingly. Signed-off-by: Fabrizio Castro Reviewed-by: Geert Uytterhoeven Reviewed-by: Lad Prabhakar Link: https://patch.msgid.link/20260514210220.7616-1-fabrizio.castro.jz@renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi index f87c2492f414..ba0f5d12772c 100644 --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi @@ -275,12 +275,63 @@ , /* SD0_DATA5 */ , /* SD0_DATA6 */ ; /* SD0_DATA7 */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; }; - ctrl-pins { - pinmux = , /* SD0_CLK */ - , /* SD0_CMD */ - ; /* SD0_RST# */ + clk-pins { + pinmux = ; /* SD0_CLK */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + }; + + cmd-pins { + pinmux = ; /* SD0_CMD */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + rst-pins { + pinmux = ; /* SD0_RST# */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + }; + }; + + sdhi0_emmc_uhs_pins: sd0-emmc-uhs-group { + data-pins { + pinmux = , /* SD0_DATA0 */ + , /* SD0_DATA1 */ + , /* SD0_DATA2 */ + , /* SD0_DATA3 */ + , /* SD0_DATA4 */ + , /* SD0_DATA5 */ + , /* SD0_DATA6 */ + ; /* SD0_DATA7 */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux = ; /* SD0_CLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; + + cmd-pins { + pinmux = ; /* SD0_CMD */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + rst-pins { + pinmux = ; /* SD0_RST# */ + drive-strength-microamp = <9000>; + slew-rate = <1>; }; }; @@ -299,12 +350,49 @@ , /* SD0_DATA1 */ , /* SD0_DATA2 */ ; /* SD0_DATA3 */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux = ; /* SD0_CLK */ + drive-strength-microamp = <9000>; + slew-rate = <1>; }; ctrl-pins { - pinmux = , /* SD0_CLK */ - , /* SD0_CMD */ + pinmux = , /* SD0_CMD */ ; /* SD0_CD */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; + }; + }; + + sdhi0_sd_uhs_pins: sd0-sd-uhs-group { + data-pins { + pinmux = , /* SD0_DATA0 */ + , /* SD0_DATA1 */ + , /* SD0_DATA2 */ + ; /* SD0_DATA3 */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux = ; /* SD0_CLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; + }; + + ctrl-pins { + pinmux = , /* SD0_CMD */ + ; /* SD0_CD */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; }; }; @@ -323,12 +411,49 @@ , /* SD1_DATA1 */ , /* SD1_DATA2 */ ; /* SD1_DATA3 */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux = ; /* SD1_CLK */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + }; + + ctrl-pins { + pinmux = , /* SD1_CMD */ + ; /* SD1_CD */ + drive-strength-microamp = <5000>; + slew-rate = <1>; + input-schmitt-disable; + }; + }; + + sdhi1_uhs_pins: sd1-uhs-group { + data-pins { + pinmux = , /* SD1_DATA0 */ + , /* SD1_DATA1 */ + , /* SD1_DATA2 */ + ; /* SD1_DATA3 */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; + }; + + clk-pins { + pinmux = ; /* SD1_CLK */ + drive-strength-microamp = <11800>; + slew-rate = <1>; }; ctrl-pins { - pinmux = , /* SD1_CLK */ - , /* SD1_CMD */ + pinmux = , /* SD1_CMD */ ; /* SD1_CD */ + drive-strength-microamp = <9000>; + slew-rate = <1>; + input-schmitt-disable; }; }; }; @@ -342,7 +467,7 @@ #if SD0_EMMC &sdhi0 { pinctrl-0 = <&sdhi0_emmc_pins>; - pinctrl-1 = <&sdhi0_emmc_pins>; + pinctrl-1 = <&sdhi0_emmc_uhs_pins>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_1p8v>; @@ -357,7 +482,7 @@ #if SD0_SD &sdhi0 { pinctrl-0 = <&sdhi0_sd_pins>; - pinctrl-1 = <&sdhi0_sd_pins>; + pinctrl-1 = <&sdhi0_sd_uhs_pins>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <®_3p3v>; vqmmc-supply = <&vqmmc_sdhi0>; @@ -372,7 +497,7 @@ #if SD1_MICRO_SD &sdhi1 { pinctrl-0 = <&sdhi1_pins>; - pinctrl-1 = <&sdhi1_pins>; + pinctrl-1 = <&sdhi1_uhs_pins>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <®_3p3v>; vqmmc-supply = <&vccq_sdhi1>;