From: Ramana Radhakrishnan Date: Tue, 12 Apr 2011 13:52:46 +0000 (+0000) Subject: re PR target/48090 (gcc 4.5.2 miscompilation when building on arm) X-Git-Tag: releases/gcc-4.5.3~79 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a7b973c8b3bf0060f744931bed9de96ebf22fba3;p=thirdparty%2Fgcc.git re PR target/48090 (gcc 4.5.2 miscompilation when building on arm) Fix PR target/48090 From-SVN: r172320 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 83e48e59671b..fdd2535499ff 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2011-04-12 Ramana Radhakrishnan + + Backport from mainline: + 2011-04-12 Ramana Radhakrishnan + PR target/48090 + * config/arm/arm.md (*arm_negdi2): Fix early clobber constraints. + 2011-04-12 Rainer Orth Backport from mainline: diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 0de4a1441d5a..8a957d71c7a9 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3554,7 +3554,7 @@ ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). ;; The first alternative allows the common case of a *full* overlap. (define_insn "*arm_negdi2" - [(set (match_operand:DI 0 "s_register_operand" "=&r,r") + [(set (match_operand:DI 0 "s_register_operand" "=r,&r") (neg:DI (match_operand:DI 1 "s_register_operand" "0,r"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM"