From: Junhui Liu <junhui.liu@pigmoral.tech>
Date: Tue, 21 Oct 2025 09:41:43 +0000 (+0800)
Subject: dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
X-Git-Tag: v6.19-rc1~99^2^2~5
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=a94f9be29464f85e97683901162ca236dde40dc7;p=thirdparty%2Flinux.git

dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart

The Anlogic DR1V90 SoC integrates a UART controller compatible with
snps,dw-apb-uart, operating at a 50 MHz clock.

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---

diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
index cb9da6c97afcf..691bd0bac6be4 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
@@ -51,6 +51,7 @@ properties:
           - const: renesas,rzn1-uart
       - items:
           - enum:
+              - anlogic,dr1v90-uart
               - brcm,bcm11351-dw-apb-uart
               - brcm,bcm21664-dw-apb-uart
               - rockchip,px30-uart