From: Cong Dang Date: Thu, 25 Jul 2024 19:49:08 +0000 (+0200) Subject: clk: renesas: r8a779h0: Add PWM clock X-Git-Tag: v6.12-rc1~83^2~3^3~1^2~4 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ab52dd821f89abd3165f5b39936cc08ef2f9169e;p=thirdparty%2Fkernel%2Flinux.git clk: renesas: r8a779h0: Add PWM clock Add the module clock used by the PWM timers on the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Cong Dang [wsa: rebased] Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20240725194906.14644-9-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index e03118bf42ac8..ef707dce84009 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -196,6 +196,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { DEF_MOD("msi4", 622, R8A779H0_CLK_MSO), DEF_MOD("msi5", 623, R8A779H0_CLK_MSO), DEF_MOD("pcie0", 624, R8A779H0_CLK_S0D2_HSC), + DEF_MOD("pwm", 628, R8A779H0_CLK_SASYNCPERD4), DEF_MOD("rpc-if", 629, R8A779H0_CLK_RPCD2), DEF_MOD("scif0", 702, R8A779H0_CLK_SASYNCPERD4), DEF_MOD("scif1", 703, R8A779H0_CLK_SASYNCPERD4),