From: Lehua Ding Date: Wed, 30 Aug 2023 09:48:00 +0000 (+0800) Subject: RISC-V: Fix vsetvl pass ICE X-Git-Tag: basepoints/gcc-15~6556 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ac55f9710fe82a4ed8cb132f57303775ce60e5d1;p=thirdparty%2Fgcc.git RISC-V: Fix vsetvl pass ICE This patch fix pr111234 (a vsetvl pass ICE) when fuse a mask any vlmax vsetvl_vtype_change_only insn with a mu vsetvl insn. PR target/111234 gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/vsetvl/pr111234.c: New test. --- diff --git a/gcc/config/riscv/riscv-vsetvl.cc b/gcc/config/riscv/riscv-vsetvl.cc index 1386d9250ca0..a81bb53a5218 100644 --- a/gcc/config/riscv/riscv-vsetvl.cc +++ b/gcc/config/riscv/riscv-vsetvl.cc @@ -655,7 +655,7 @@ gen_vsetvl_pat (rtx_insn *rinsn, const vector_insn_info &info, new_pat = gen_vsetvl_pat (VSETVL_NORMAL, new_info, vl); else { - if (vsetvl_insn_p (rinsn) || vlmax_avl_p (info.get_avl ())) + if (vsetvl_insn_p (rinsn)) new_pat = gen_vsetvl_pat (VSETVL_NORMAL, new_info, get_vl (rinsn)); else if (INSN_CODE (rinsn) == CODE_FOR_vsetvl_vtype_change_only) new_pat = gen_vsetvl_pat (VSETVL_VTYPE_CHANGE_ONLY, new_info, NULL_RTX); diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c new file mode 100644 index 000000000000..ee5eec4a2575 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/pr111234.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d -O3" } */ + +#include + +void +f (vint32m1_t *in, vint64m2_t *out, vbool32_t *m, int b) +{ + vint32m1_t va = *in; + vbool32_t mask = *m; + vint64m2_t vb + = __riscv_vwadd_vx_i64m2_m (mask, va, 1, __riscv_vsetvlmax_e64m2 ()); + vint64m2_t vc = __riscv_vadd_vx_i64m2 (vb, 1, __riscv_vsetvlmax_e64m2 ()); + + if (b != 0) + vc = __riscv_vadd_vx_i64m2_mu (mask, vc, vc, 1, __riscv_vsetvlmax_e64m2 ()); + + *out = vc; +}