From: Julian Seward <jseward@acm.org>
Date: Tue, 29 Jan 2013 22:14:01 +0000 (+0000)
Subject: test_reservation(), test_double_pair_instrs(): Fix broken inline assembly
X-Git-Tag: svn/VALGRIND_3_9_0~402
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ac5abb76ac8f308dba7e5474b0b0298749026ef0;p=thirdparty%2Fvalgrind.git

test_reservation(), test_double_pair_instrs(): Fix broken inline assembly
causing segfaults with gcc-4.7.  The inline assembly still isn't right,
but it's better than it was before.



git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13279
---

diff --git a/memcheck/tests/ppc32/power_ISA2_05.c b/memcheck/tests/ppc32/power_ISA2_05.c
index a95f4275e3..017845261e 100644
--- a/memcheck/tests/ppc32/power_ISA2_05.c
+++ b/memcheck/tests/ppc32/power_ISA2_05.c
@@ -103,8 +103,8 @@ void test_double_pair_instrs()
    FRT2 = -1.0;
    base = (unsigned long) &dbl_pair;
    offset = (unsigned long) &dbl_pair[1] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lfdpx 10, 20, 21");
    __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
    __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
@@ -115,8 +115,8 @@ void test_double_pair_instrs()
    FRT2 = -16.1024;
    base = (unsigned long) &dbl_pair;
    offset = (unsigned long) &dbl_pair[2] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
    __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
    __asm__ volatile ("stfdpx 10, 20, 21");
@@ -168,14 +168,14 @@ void test_reservation()
 
    base = (unsigned long) &arr;
    offset = (unsigned long) &arr[1] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
    printf("lwarx => %x\n", RT);
 
 #ifdef __powerpc64__
    offset = (unsigned long) &arr[1] - base;
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
    printf("ldarx => %x\n", RT);
 #endif
diff --git a/memcheck/tests/ppc64/power_ISA2_05.c b/memcheck/tests/ppc64/power_ISA2_05.c
index dcf0e7aacb..8c0eab99a6 100644
--- a/memcheck/tests/ppc64/power_ISA2_05.c
+++ b/memcheck/tests/ppc64/power_ISA2_05.c
@@ -101,8 +101,8 @@ void test_double_pair_instrs()
    FRT2 = -1.0;
    base = (unsigned long) &dbl_pair;
    offset = (unsigned long) &dbl_pair[1] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lfdpx 10, 20, 21");
    __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
    __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
@@ -113,8 +113,8 @@ void test_double_pair_instrs()
    FRT2 = -16.1024;
    base = (unsigned long) &dbl_pair;
    offset = (unsigned long) &dbl_pair[2] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("fmr %0, 10":"=f" (FRT1));
    __asm__ volatile ("fmr %0, 11":"=f" (FRT2));
    __asm__ volatile ("stfdpx 10, 20, 21");
@@ -166,14 +166,14 @@ void test_reservation()
 
    base = (unsigned long) &arr;
    offset = (unsigned long) &arr[1] - base;
-   __asm__ volatile ("or 20, 0, %0"::"r" (base));
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 20, %0, 0"::"r" (base));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
    printf("lwarx => %x\n", RT);
 
 #ifdef __powerpc64__
    offset = (unsigned long) &arr[1] - base;
-   __asm__ volatile ("or 21, 0, %0"::"r" (offset));
+   __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
    __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
    printf("ldarx => %x\n", RT);
 #endif