From: LIU Zhiwei <zhiwei_liu@c-sky.com>
Date: Tue, 1 Feb 2022 06:46:01 +0000 (+0800)
Subject: target/riscv: Fix vill field write in vtype
X-Git-Tag: v7.0.0-rc0~51^2~24
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ac6bcf4d467a091b11ece782f4bf0a41e0f59cef;p=thirdparty%2Fqemu.git

target/riscv: Fix vill field write in vtype

The guest should be able to set the vill bit as part of vsetvl.

Currently we may set env->vill to 1 in the vsetvl helper, but there
is nowhere that we set it to 0, so once it transitions to 1 it's stuck
there until the system is reset.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220201064601.41143-1-zhiwei_liu@c-sky.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 020d2e841f9..3bd4aac9c97 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -71,6 +71,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
     env->vl = vl;
     env->vtype = s2;
     env->vstart = 0;
+    env->vill = 0;
     return vl;
 }