From: Wilco Dijkstra Date: Wed, 15 Jul 2020 15:58:07 +0000 (+0100) Subject: AArch64: Rename IS_ARES to IS_NEOVERSE_N1 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ad34abcad57d49f1882479a561d42bace1950c3e;p=thirdparty%2Fglibc.git AArch64: Rename IS_ARES to IS_NEOVERSE_N1 Rename IS_ARES to IS_NEOVERSE_N1 since that is a bit clearer. Reviewed-by: Carlos O'Donell (cherry picked from commit 0f6278a8793a5d04ea31878119eccf99f469a02d) --- diff --git a/sysdeps/aarch64/multiarch/memcpy.c b/sysdeps/aarch64/multiarch/memcpy.c index 5fa99dd0270..be23c1ef02a 100644 --- a/sysdeps/aarch64/multiarch/memcpy.c +++ b/sysdeps/aarch64/multiarch/memcpy.c @@ -41,7 +41,9 @@ libc_ifunc (__libc_memcpy, ? __memcpy_falkor : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) ? __memcpy_thunderx2 - : (IS_ARES (midr) ? __memcpy_simd : __memcpy_generic))))); + : (IS_NEOVERSE_N1 (midr) + ? __memcpy_simd + : __memcpy_generic))))); # undef memcpy strong_alias (__libc_memcpy, memcpy); diff --git a/sysdeps/aarch64/multiarch/memmove.c b/sysdeps/aarch64/multiarch/memmove.c index af496255b17..71753f2880a 100644 --- a/sysdeps/aarch64/multiarch/memmove.c +++ b/sysdeps/aarch64/multiarch/memmove.c @@ -41,7 +41,9 @@ libc_ifunc (__libc_memmove, ? __memmove_falkor : (IS_THUNDERX2 (midr) || IS_THUNDERX2PA (midr) ? __memmove_thunderx2 - : (IS_ARES (midr) ? __memmove_simd : __memmove_generic))))); + : (IS_NEOVERSE_N1 (midr) + ? __memmove_simd + : __memmove_generic))))); # undef memmove strong_alias (__libc_memmove, memmove); diff --git a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h index 127391138d5..85ba3b3d94f 100644 --- a/sysdeps/unix/sysv/linux/aarch64/cpu-features.h +++ b/sysdeps/unix/sysv/linux/aarch64/cpu-features.h @@ -51,8 +51,8 @@ #define IS_PHECDA(midr) (MIDR_IMPLEMENTOR(midr) == 'h' \ && MIDR_PARTNUM(midr) == 0x000) -#define IS_ARES(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ - && MIDR_PARTNUM(midr) == 0xd0c) +#define IS_NEOVERSE_N1(midr) (MIDR_IMPLEMENTOR(midr) == 'A' \ + && MIDR_PARTNUM(midr) == 0xd0c) #define IS_EMAG(midr) (MIDR_IMPLEMENTOR(midr) == 'P' \ && MIDR_PARTNUM(midr) == 0x000)