From: Krzysztof Kozlowski Date: Tue, 8 Apr 2025 09:32:08 +0000 (+0200) Subject: arm64: dts: qcom: sc7180: Use the header with DSI phy clock IDs X-Git-Tag: v6.16-rc1~97^2~20^2~106 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=adaa876233c102e53fb2bafe4f502474613f4ed2;p=thirdparty%2Fkernel%2Fstable.git arm64: dts: qcom: sc7180: Use the header with DSI phy clock IDs Use the header with DSI phy clock IDs to make code more readable. Reviewed-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250408-dts-qcom-dsi-phy-clocks-v2-11-73b482a6dd02@linaro.org Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 87c432c12a240..d157863dbc4a1 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -3284,8 +3285,10 @@ "iface", "bus"; - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; operating-points-v2 = <&dsi_opp_table>; power-domains = <&rpmhpd SC7180_CX>; @@ -3433,8 +3436,8 @@ reg = <0 0x0af00000 0 0x200000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_DISP_GPLL0_CLK_SRC>, - <&mdss_dsi0_phy 0>, - <&mdss_dsi0_phy 1>, + <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, + <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>, <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>; clock-names = "bi_tcxo",