From: Bill Schmidt Date: Wed, 12 Apr 2017 13:45:27 +0000 (+0000) Subject: backport: re PR target/80376 (Some vec_xxpermdi usage lead to ICE) X-Git-Tag: releases/gcc-5.5.0~408 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=ae58ca721253935f72e6afb80c168c15d38db06c;p=thirdparty%2Fgcc.git backport: re PR target/80376 (Some vec_xxpermdi usage lead to ICE) 2017-04-12 Bill Schmidt Backport from mainline 2017-04-11 Bill Schmidt PR target/80376 PR target/80315 * config/rs6000/rs6000.c (rs6000_expand_unop_builtin): Return CONST0_RTX (mode) rather than const0_rtx where appropriate. (rs6000_expand_binop_builtin): Likewise. (rs6000_expand_ternop_builtin): Likewise; also add missing vsx_xxpermdi_* variants; also fix typo (arg1 => arg2) for vshasigma built-ins. * doc/extend.texi: Document that vec_xxpermdi's third argument must be a constant. From-SVN: r246874 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4e1da819e9a0..d05b488db21e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2017-04-12 Bill Schmidt + + Backport from mainline + 2017-04-11 Bill Schmidt + + PR target/80376 + PR target/80315 + * config/rs6000/rs6000.c (rs6000_expand_unop_builtin): Return + CONST0_RTX (mode) rather than const0_rtx where appropriate. + (rs6000_expand_binop_builtin): Likewise. + (rs6000_expand_ternop_builtin): Likewise; also add missing + vsx_xxpermdi_* variants; also fix typo (arg1 => arg2) for + vshasigma built-ins. + * doc/extend.texi: Document that vec_xxpermdi's third argument + must be a constant. + 2017-04-11 Thomas Preud'homme Backport from GCC 6 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index cd3a73d66701..bb3d8c5ec1f0 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -12175,7 +12175,7 @@ rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target) || INTVAL (op0) < -16) { error ("argument 1 must be a 5-bit signed literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } @@ -12278,7 +12278,7 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg1) & ~0x1f) { error ("argument 2 must be a 5-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } @@ -12957,13 +12957,18 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg2) & ~0xf) { error ("argument 3 must be a 4-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_vsx_xxpermdi_v2df || icode == CODE_FOR_vsx_xxpermdi_v2di || icode == CODE_FOR_vsx_xxpermdi_v2df_be || icode == CODE_FOR_vsx_xxpermdi_v2di_be + || icode == CODE_FOR_vsx_xxpermdi_v1ti + || icode == CODE_FOR_vsx_xxpermdi_v4sf + || icode == CODE_FOR_vsx_xxpermdi_v4si + || icode == CODE_FOR_vsx_xxpermdi_v8hi + || icode == CODE_FOR_vsx_xxpermdi_v16qi || icode == CODE_FOR_vsx_xxsldwi_v16qi || icode == CODE_FOR_vsx_xxsldwi_v8hi || icode == CODE_FOR_vsx_xxsldwi_v4si @@ -12977,7 +12982,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg2) & ~0x3) { error ("argument 3 must be a 2-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_vsx_set_v2df @@ -12997,7 +13002,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg2) & ~0x1) { error ("argument 3 must be a 1-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_dfp_ddedpd_dd @@ -13009,7 +13014,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg2) & ~0x3) { error ("argument 1 must be 0 or 2"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_dfp_denbcd_dd @@ -13021,7 +13026,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg0) & ~0x1) { error ("argument 1 must be a 1-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_dfp_dscli_dd @@ -13035,7 +13040,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) || TREE_INT_CST_LOW (arg1) & ~0x3f) { error ("argument 2 must be a 6-bit unsigned literal"); - return const0_rtx; + return CONST0_RTX (tmode); } } else if (icode == CODE_FOR_crypto_vshasigmaw @@ -13047,14 +13052,14 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) if (TREE_CODE (arg1) != INTEGER_CST || wi::geu_p (arg1, 2)) { error ("argument 2 must be 0 or 1"); - return const0_rtx; + return CONST0_RTX (tmode); } STRIP_NOPS (arg2); - if (TREE_CODE (arg2) != INTEGER_CST || wi::geu_p (arg1, 16)) + if (TREE_CODE (arg2) != INTEGER_CST || wi::geu_p (arg2, 16)) { error ("argument 3 must be in the range 0..15"); - return const0_rtx; + return CONST0_RTX (tmode); } } diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index b0be1a6f8128..f8b2aa2e25c1 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -14638,20 +14638,21 @@ void vec_vsx_st (vector bool char, int, vector bool char *); void vec_vsx_st (vector bool char, int, unsigned char *); void vec_vsx_st (vector bool char, int, signed char *); -vector double vec_xxpermdi (vector double, vector double, int); -vector float vec_xxpermdi (vector float, vector float, int); -vector long long vec_xxpermdi (vector long long, vector long long, int); +vector double vec_xxpermdi (vector double, vector double, const int); +vector float vec_xxpermdi (vector float, vector float, const int); +vector long long vec_xxpermdi (vector long long, vector long long, const int); vector unsigned long long vec_xxpermdi (vector unsigned long long, - vector unsigned long long, int); -vector int vec_xxpermdi (vector int, vector int, int); + vector unsigned long long, const int); +vector int vec_xxpermdi (vector int, vector int, const int); vector unsigned int vec_xxpermdi (vector unsigned int, - vector unsigned int, int); -vector short vec_xxpermdi (vector short, vector short, int); + vector unsigned int, const int); +vector short vec_xxpermdi (vector short, vector short, const int); vector unsigned short vec_xxpermdi (vector unsigned short, - vector unsigned short, int); -vector signed char vec_xxpermdi (vector signed char, vector signed char, int); + vector unsigned short, const int); +vector signed char vec_xxpermdi (vector signed char, vector signed char, + const int); vector unsigned char vec_xxpermdi (vector unsigned char, - vector unsigned char, int); + vector unsigned char, const int); vector double vec_xxsldi (vector double, vector double, int); vector float vec_xxsldi (vector float, vector float, int);