From: Niklas Söderlund Date: Wed, 15 Jan 2025 17:59:26 +0000 (+0100) Subject: clk: renesas: r8a779h0: Add FCPVX clock X-Git-Tag: v6.15-rc1~103^2~2^2~1^2~8 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=aeb06d51ea3ff689eea744f38f7c08181171fe5a;p=thirdparty%2Fkernel%2Flinux.git clk: renesas: r8a779h0: Add FCPVX clock Add the FCPVX modules clock for Renesas R-Car V4M. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250115175927.3714357-2-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a779h0-cpg-mssr.c b/drivers/clk/renesas/r8a779h0-cpg-mssr.c index 4c8052ac32df6..9dc70a5e55f6c 100644 --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -239,6 +239,7 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { DEF_MOD("pfc1", 916, R8A779H0_CLK_CP), DEF_MOD("pfc2", 917, R8A779H0_CLK_CP), DEF_MOD("tsc2:tsc1", 919, R8A779H0_CLK_CL16M), + DEF_MOD("fcpvx0", 1100, R8A779H0_CLK_S0D1_VIO), DEF_MOD("ssiu", 2926, R8A779H0_CLK_S0D6_PER), DEF_MOD("ssi", 2927, R8A779H0_CLK_S0D6_PER), };