From: Mark Brown Date: Fri, 14 Nov 2025 14:47:49 +0000 (+0000) Subject: spi-cadence: support transmission with X-Git-Tag: v6.19-rc1~150^2~17 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=af330925a18ff483adace1c4ed2dcc975a31d5c0;p=thirdparty%2Fkernel%2Flinux.git spi-cadence: support transmission with Merge series from Jun Guo : The Cadence SPI IP supports configurable FIFO data widths during integration. On some SoCs, the FIFO data width is designed to be 16 or 32 bits at the chip design stage. However, the current driver only supports communication with an 8-bit FIFO data width. Therefore, these patches are added to enable the driver to support communication with 16-bit and 32-bit FIFO data widths. --- af330925a18ff483adace1c4ed2dcc975a31d5c0