From: Steve Ellcey <sellcey@imgtec.com>
Date: Fri, 29 Jan 2016 16:31:18 +0000 (+0000)
Subject: re PR target/65604 (MIPS -fno-delayed-branch generates incorrect code with -mcheck... 
X-Git-Tag: basepoints/gcc-7~1214
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=af932cdb8a5246ceb6330fe56277305e5a65dbb9;p=thirdparty%2Fgcc.git

re PR target/65604 (MIPS -fno-delayed-branch generates incorrect code with -mcheck-zero-division)

	PR target/65604
	* gcc.target/mips/div-delay.c: New test.

From-SVN: r232986
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 150ebc803ac4..6d6b8d877a6f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-01-29  Steve Ellcey  <sellcey@imgtec.com>
+
+	PR target/65604
+	* gcc.target/mips/div-delay.c: New test.
+
 2016-01-29  Jakub Jelinek  <jakub@redhat.com>
 
 	PR target/69551
diff --git a/gcc/testsuite/gcc.target/mips/div-delay.c b/gcc/testsuite/gcc.target/mips/div-delay.c
new file mode 100644
index 000000000000..bdeb125d3f54
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/div-delay.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-march=mips1 -fno-delayed-branch" } */
+/* { dg-final { scan-assembler "\tbne\t.*\tnop" } } */
+
+/* Ensure that mips1 does not put anything in the delay slot of the bne
+   instruction when checking for divide by zero.  mips2+ systems use teq
+   instead of bne and teq has no delay slot.  */
+
+NOCOMPRESSION int
+foo (int a, int b)
+{
+  return a / b;
+}