From: Alexey Charkov Date: Wed, 21 May 2025 13:00:09 +0000 (+0400) Subject: dt-bindings: timer: via,vt8500-timer: Convert to YAML X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b06d6a1d0cc6d0d44a8175108356016057718081;p=thirdparty%2Flinux.git dt-bindings: timer: via,vt8500-timer: Convert to YAML Rewrite the textual description for the VIA/WonderMedia timer as YAML schema. The IP can generate up to four interrupts from four respective match registers, so reflect that in the schema. Reviewed-by: Rob Herring (Arm) Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250521-vt8500-timer-updates-v5-1-7e4bd11df72e@gmail.com Signed-off-by: Rob Herring (Arm) --- diff --git a/Documentation/devicetree/bindings/timer/via,vt8500-timer.txt b/Documentation/devicetree/bindings/timer/via,vt8500-timer.txt deleted file mode 100644 index 901c73f0d8ef0..0000000000000 --- a/Documentation/devicetree/bindings/timer/via,vt8500-timer.txt +++ /dev/null @@ -1,15 +0,0 @@ -VIA/Wondermedia VT8500 Timer ------------------------------------------------------ - -Required properties: -- compatible : "via,vt8500-timer" -- reg : Should contain 1 register ranges(address and length) -- interrupts : interrupt for the timer - -Example: - - timer@d8130100 { - compatible = "via,vt8500-timer"; - reg = <0xd8130100 0x28>; - interrupts = <36>; - }; diff --git a/Documentation/devicetree/bindings/timer/via,vt8500-timer.yaml b/Documentation/devicetree/bindings/timer/via,vt8500-timer.yaml new file mode 100644 index 0000000000000..e748149948f31 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/via,vt8500-timer.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/via,vt8500-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: VIA/Wondermedia VT8500 Timer + +description: + This is the timer block that is a standalone part of the system power + management controller on VIA/WonderMedia SoCs (VIA VT8500 and alike). + The hardware has a single 32-bit counter running at 3 MHz and four match + registers, each of which is associated with a dedicated match interrupt, + and the first of which can also serve as the system watchdog (if the + watchdog function is enabled, it will reset the system upon match instead + of triggering its respective interrupt) + +maintainers: + - Alexey Charkov + +properties: + compatible: + const: via,vt8500-timer + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + items: + - description: Channel 0 match. Note that if the watchdog function + is enabled, this interrupt will not fire and the system will + reboot instead once the counter reaches match register 0 value + - description: Channel 1 match + - description: Channel 2 match + - description: Channel 3 match + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + timer@d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a0d5bc02c7fc1..98229b793161e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3508,6 +3508,7 @@ F: Documentation/devicetree/bindings/hwinfo/via,vt8500-scc-id.yaml F: Documentation/devicetree/bindings/i2c/wm,wm8505-i2c.yaml F: Documentation/devicetree/bindings/interrupt-controller/via,vt8500-intc.yaml F: Documentation/devicetree/bindings/pwm/via,vt8500-pwm.yaml +F: Documentation/devicetree/bindings/timer/via,vt8500-timer.yaml F: arch/arm/boot/dts/vt8500/ F: arch/arm/mach-vt8500/ F: drivers/clocksource/timer-vt8500.c