From: Harlan Stenn <stenn@ntp.org>
Date: Thu, 31 Mar 2011 17:11:38 +0000 (-0400)
Subject: Temporarily restore legacy ppsclock global fdpps for trak, zyfer refclocks
X-Git-Tag: NTP_4_2_7P143~1
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b21763774f06f063a7778a6a306c842371c81d14;p=thirdparty%2Fntp.git

Temporarily restore legacy ppsclock global fdpps for trak, zyfer refclocks

bk: 4d94b5caGq5gE0YZo38ez6cPm_xIUA
---

diff --git a/ntpd/ntp_refclock.c b/ntpd/ntp_refclock.c
index 72ae82446..2e333a59b 100644
--- a/ntpd/ntp_refclock.c
+++ b/ntpd/ntp_refclock.c
@@ -61,6 +61,9 @@
 #define FUDGEFAC	.1	/* fudge correction factor */
 #define LF		0x0a	/* ASCII LF */
 
+#ifdef PPS	/* fdpps still ref'd by refclock_zyfer.c */
+int	fdpps;			/* ppsclock legacy */
+#endif /* PPS */
 int	cal_enable;		/* enable refclock calibrate */
 
 /*
@@ -728,7 +731,9 @@ refclock_setup(
 {
 	int	i;
 	TTY	ttyb, *ttyp;
-
+#ifdef PPS		/* fdpps referenced by refclock_zyfer.c */
+	fdpps = fd;		/* ppsclock legacy */
+#endif /* PPS */
 	/*
 	 * By default, the serial line port is initialized in canonical
 	 * (line-oriented) mode at specified line speed, 8 bits and no