From: Caleb James DeLisle Date: Wed, 15 Apr 2026 14:22:27 +0000 (+0000) Subject: econet: add EN751627 subtarget and Zyxel EX3301-T0 board X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b33959a6683a982e7205c044ceaa7c95c3c8258f;p=thirdparty%2Fopenwrt.git econet: add EN751627 subtarget and Zyxel EX3301-T0 board The EN751627 EcoNet subtarget consists of the EN7516 DSL SoC and the (rare) EN7527 xPON SoC. We currently support pci / wifi, usb and flash, but the EN751221 eth driver is not portable to this family right now. Zyxel EX3301-T0 is a wifi router based on the EN7516, it is a DSL SoC but lacks the DSL port. Installation instructions: 1. Serial access is required, stop the Zyxel bootloader. 2. Use ATENv3 https://github.com/cjdelisle/ATENv3 to unlock bootloader 3. "ATLD x" on the prompt to start a TFTP server 4. Connect ethernet cable from any lan (yellow) port on modem to a device. 5. On your device, configure network to 192.168.1.2/30 6. On your device, send TRX file to 192.168.1.1 with name x, i.e. tftp -p -l ./econet/tclinux -r x 192.168.1.1 7. On modem, you should see a line like this: "Total 8022324 (0x7A6934) bytes received" note the hex value 8. "ATGU" to enter econet bootloader 9. "flash 80000 80020000 " For example: flash 80000 80020000 7A6934 10. "reboot 1" -- start the system If it boots back into the factory OS, you need to switch OS, from the ZHAL prompt: 1. "ATCB" -- load data from flash 2. "ATCF 0" -- switch to OS 0 3. "ATBT 1" -- enable flash write 4. "ATSB" -- save data 5. "ATSR 1" -- reboot system Signed-off-by: Caleb James DeLisle Link: https://github.com/openwrt/openwrt/pull/22945 Signed-off-by: Hauke Mehrtens --- diff --git a/target/linux/econet/Makefile b/target/linux/econet/Makefile index aa8ba09c0f8..c0318ef85dd 100644 --- a/target/linux/econet/Makefile +++ b/target/linux/econet/Makefile @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk BOARD:=econet BOARDNAME:=EcoNet EN75xx MIPS FEATURES:=dt source-only squashfs nand usb -SUBTARGETS:=en751221 en7528 +SUBTARGETS:=en751221 en751627 en7528 KERNEL_PATCHVER:=6.12 diff --git a/target/linux/econet/base-files/sbin/en75_chboot b/target/linux/econet/base-files/sbin/en75_chboot index 57ba961ba99..1d711e465cf 100755 --- a/target/linux/econet/base-files/sbin/en75_chboot +++ b/target/linux/econet/base-files/sbin/en75_chboot @@ -137,6 +137,14 @@ main() { code_openwrt=30000000 code_factory=31000000 ;; + zyxel,ex3301-t0) + part=$(part_named '"reservearea"') + offset_blocks=5 + block_size=$((1024 * 128)) + code_offset=4095 + code_openwrt=30 + code_factory=31 + ;; zyxel,pmg5617ga) # 00060fff part=$(part_named '"reservearea"') diff --git a/target/linux/econet/dts/en751627.dtsi b/target/linux/econet/dts/en751627.dtsi new file mode 100644 index 00000000000..9da037052a7 --- /dev/null +++ b/target/linux/econet/dts/en751627.dtsi @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +#include +#include +#include + +/ { + compatible = "econet,en751627"; + #address-cells = <1>; + #size-cells = <1>; + + hpt_clock: clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; /* 200 MHz */ + }; + + spi_clock: spi-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <40000000>; /* 40 MHz */ + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "mips,mips1004Kc"; + reg = <0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "mips,mips1004Kc"; + reg = <1>; + }; + }; + + cpuintc: interrupt-controller { + compatible = "mti,cpu-interrupt-controller"; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + gic: interrupt-controller@1f8c0000 { + compatible = "mti,gic"; + reg = <0x1f8c0000 0x20000>; + + interrupt-controller; + #interrupt-cells = <3>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; + + pcie_phy0: pcie-phy@1faf2000 { + compatible = "econet,en7528-pcie-phy1"; + reg = <0x1faf2000 0x1000>; + #phy-cells = <0>; + }; + + pcie_phy1: pcie-phy@1fac0000 { + compatible = "econet,en7528-pcie-phy1"; + reg = <0x1fac0000 0x1000>; + #phy-cells = <0>; + }; + + gpio0: gpio@1fbf0200 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0204 0x4>, + <0x1fbf0200 0x4>, + <0x1fbf0220 0x4>, + <0x1fbf0214 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio1: gpio@1fbf0270 { + compatible = "airoha,en7523-gpio"; + reg = <0x1fbf0270 0x4>, + <0x1fbf0260 0x4>, + <0x1fbf0264 0x4>, + <0x1fbf0278 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + scu: system-controller@1fb00000 { + compatible = "airoha,en7523-scu"; + reg = <0x1fa20000 0x400>, + <0x1fb00000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + timer_hpt: timer@1fbf0400 { + compatible = "econet,en7528-timer"; + reg = <0x1fbf0400 0x14>, + <0x1fbe0000 0x14>; + + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + + clocks = <&hpt_clock>; + }; + + spi_ctrl: spi@1fa10000 { + compatible = "airoha,en7581-snand"; + reg = <0x1fa10000 0x140>, + <0x1fa11000 0x160>; + + clocks = <&spi_clock>; + clock-names = "spi"; + + #address-cells = <1>; + #size-cells = <0>; + + nand: nand@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <2>; + }; + }; + + uart: serial@1fbf0000 { + compatible = "airoha,en7523-uart"; + reg = <0x1fbf0000 0x30>; + reg-io-width = <4>; + reg-shift = <2>; + + interrupt-parent = <&gic>; + interrupts = ; + + clock-frequency = <7372800>; + }; + + pciecfg: pciecfg@1fb80000 { + compatible = "mediatek,generic-pciecfg", "syscon"; + reg = <0x1fb80000 0x1000>; + }; + + pcie0: pcie@1fb81000 { + compatible = "econet,en7528-pcie"; + device_type = "pci"; + reg = <0x1fb81000 0x1000>; + reg-names = "port0"; + linux,pci-domain = <0>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck0"; + phys = <&pcie_phy0>; + phy-names = "pcie-phy0"; + bus-range = <0x00 0xff>; + ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00010000>, + <0x82000000 0 0x20000000 0x20000000 0 0x08000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc0 0>, + <0 0 0 2 &pcie_intc0 1>, + <0 0 0 3 &pcie_intc0 2>, + <0 0 0 4 &pcie_intc0 3>; + + pcie_intc0: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + slot0: pcie@0,0 { + reg = <0x0000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + + pcie1: pcie@1fb83000 { + compatible = "econet,en7528-pcie"; + device_type = "pci"; + reg = <0x1fb83000 0x1000>; + reg-names = "port1"; + linux,pci-domain = <1>; + #address-cells = <3>; + #size-cells = <2>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "pcie_irq"; + clocks = <&scu EN7523_CLK_PCIE>; + clock-names = "sys_ck1"; + phys = <&pcie_phy1>; + phy-names = "pcie-phy1"; + bus-range = <0x00 0xff>; + ranges = <0x01000000 0 0x00000000 0x1f610000 0 0x00010000>, + <0x82000000 0 0x28000000 0x28000000 0 0x08000000>; + status = "disabled"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie_intc1 0>, + <0 0 0 2 &pcie_intc1 1>, + <0 0 0 3 &pcie_intc1 2>, + <0 0 0 4 &pcie_intc1 3>; + + pcie_intc1: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + slot1: pcie@1,0 { + reg = <0x0800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + }; + }; + + usb: usb@1fb90000 { + compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci"; + reg = <0x1fb90000 0x4000>, + <0x1fa80700 0x100>; + reg-names = "mac", "ippc"; + + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&gic>; + interrupts = ; + usb3-lpm-capable; + }; +}; diff --git a/target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts b/target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts new file mode 100644 index 00000000000..2c23cce0448 --- /dev/null +++ b/target/linux/econet/dts/en751627_zyxel_ex3301-t0.dts @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +#include "en751627.dtsi" + +/ { + model = "Zyxel EX3301-T0"; + compatible = "zyxel,ex3301-t0", "econet,en751627"; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + chosen { + stdout-path = "/serial@1fbf0000:115200"; + }; +}; + +&nand { + status = "okay"; + econet,bmt; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0all { + label = "all_of_flash"; + reg = <0x0 0x8000000>; + read-only; + }; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "romfile"; + reg = <0x40000 0x40000>; + read-only; + }; + + partition@80000 { + label = "tclinux"; + reg = <0x80000 0x2800000>; + read-only; + econet,enable-remap; + }; + + /* Nested inside of tclinux */ + partition@480000 { + label = "rootfs"; + reg = <0x480000 0x2400000>; + linux,rootfs; + read-only; + }; + + partition@2880000 { + label = "tclinux_alt"; + reg = <0x2880000 0x2620000>; + }; + + partition@4ea0000 { + label = "wwan"; + reg = <0x4ea0000 0x100000>; + }; + + partition@4fa0000 { + label = "factory_data"; + reg = <0x4fa0000 0x400000>; + }; + + partition@53a0000 { + label = "rom-d"; + reg = <0x53a0000 0x100000>; + }; + + partition@54a0000 { + label = "misc"; + reg = <0x54a0000 0x2000000>; + }; + + factory: partition@74a0000 { + label = "factory"; + reg = <0x74a0000 0x80000>; + }; + + partition@7520000 { + label = "reservearea"; + reg = <0x7520000 0xc0000>; + }; + }; +}; + +&pcie0 { + status = "okay"; +}; +&slot0 { + status = "okay"; + + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0000>; + big-endian; + }; +}; + +&pcie1 { + status = "okay"; + + /* Slot 1 is a second link to the same wifi chip */ +}; diff --git a/target/linux/econet/en751627/config-6.12 b/target/linux/econet/en751627/config-6.12 new file mode 100644 index 00000000000..5e7b280d720 --- /dev/null +++ b/target/linux/econet/en751627/config-6.12 @@ -0,0 +1,239 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOARD_SCACHE=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_EN7523=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_DIEI=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +# CONFIG_CPU_MIPS32_R1 is not set +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_MIPSR2_IRQ_EI=y +CONFIG_CPU_MIPSR2_IRQ_VI=y +CONFIG_CPU_MITIGATIONS=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_GF128MUL=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LIB_SHA1=y +CONFIG_CRYPTO_LIB_UTILS=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DEBUG_INFO=y +CONFIG_DEBUG_ZBOOT=y +CONFIG_DMA_NEED_SYNC=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTB_ECONET_NONE=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EARLY_PRINTK_8250=y +CONFIG_ECONET=y +CONFIG_ECONET_EN751221_TIMER=y +CONFIG_EXCLUSIVE_SYSTEM_RAM=y +CONFIG_FS_IOMAP=y +CONFIG_FUNCTION_ALIGNMENT=0 +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_EN7523=y +CONFIG_GPIO_GENERIC=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_JFFS2_FS is not set +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CM=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_CPC=y +CONFIG_MIPS_CPS=y +# CONFIG_MIPS_CPS_NS16550_BOOL is not set +CONFIG_MIPS_CPU_SCACHE=y +CONFIG_MIPS_GIC=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_MT=y +CONFIG_MIPS_MT_FPAFF=y +CONFIG_MIPS_MT_SMP=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=4 +CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MMU_LAZY_TLB_REFCOUNT=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_MTK_BMT=y +CONFIG_MTD_SPI_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=13 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SRCU_NMI_SAFE=y +CONFIG_NET_EGRESS=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_INGRESS=y +CONFIG_NET_XGRESS=y +CONFIG_NLS=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +CONFIG_NVMEM_LAYOUTS=y +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_PADATA=y +CONFIG_PAGE_POOL=y +CONFIG_PAGE_SIZE_LESS_THAN_256KB=y +CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PCI=y +CONFIG_PCIE_MEDIATEK=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_DRIVERS_GENERIC=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_ARCH_FALLBACKS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHY_EN7528_PCIE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RANDSTRUCT_NONE=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SCHED_CORE is not set +CONFIG_SCHED_SMT=y +CONFIG_SERIAL_8250_AIROHA=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +# CONFIG_SOC_ECONET_EN751221 is not set +CONFIG_SOC_ECONET_EN7528=y +CONFIG_SPI=y +# CONFIG_SPI_AIROHA_EN7523 is not set +CONFIG_SPI_AIROHA_SNFI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPLIT_PTE_PTLOCKS=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HIGHMEM=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_MIPS_CPS=y +CONFIG_SYS_SUPPORTS_MULTITHREADING=y +CONFIG_SYS_SUPPORTS_SCHED_SMT=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y +CONFIG_TARGET_ISA_REV=2 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_MTK=y +# CONFIG_USB_XHCI_PLATFORM is not set +CONFIG_USE_GENERIC_EARLY_PRINTK_8250=y +CONFIG_USE_OF=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZBOOT_LOAD_ADDRESS=0x80020000 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMMON=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/econet/en751627/profiles/00-default.mk b/target/linux/econet/en751627/profiles/00-default.mk new file mode 100644 index 00000000000..a27e6322bff --- /dev/null +++ b/target/linux/econet/en751627/profiles/00-default.mk @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2025 OpenWrt.org + +define Profile/Default + NAME:=Default Profile +endef + +define Profile/Default/Description + Default package set compatible with most EN7516 and EN7527 boards. +endef +$(eval $(call Profile,Default)) diff --git a/target/linux/econet/en751627/target.mk b/target/linux/econet/en751627/target.mk new file mode 100644 index 00000000000..df11153aedb --- /dev/null +++ b/target/linux/econet/en751627/target.mk @@ -0,0 +1,13 @@ +# SPDX-License-Identifier: GPL-2.0-only + +ARCH:=mips +SUBTARGET:=en751627 +BOARDNAME:=EN7516 and EN7527 based boards +CPU_TYPE:=24kc +KERNELNAME:=vmlinuz.bin + +DEFAULT_PACKAGES += kmod-leds-gpio kmod-gpio-button-hotplug wpad-basic-mbedtls + +define Target/Description + Build firmware images for EcoNet EN7516 and EN7527 based boards. +endef diff --git a/target/linux/econet/image/en751627.mk b/target/linux/econet/image/en751627.mk new file mode 100644 index 00000000000..299b9477034 --- /dev/null +++ b/target/linux/econet/image/en751627.mk @@ -0,0 +1,11 @@ +TRX_ENDIAN := be + +define Device/zyxel_ex3301-t0 + DEVICE_VENDOR := Zyxel + DEVICE_MODEL := EX3301-T0 + DEVICE_DTS := en751627_zyxel_ex3301-t0 + IMAGES := tclinux.trx + IMAGE/tclinux.trx := append-kernel | lzma | tclinux-trx + DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7915-firmware +endef +TARGET_DEVICES += zyxel_ex3301-t0