From: Alexandre Oliva <oliva@adacore.com>
Date: Wed, 21 Jan 2026 03:30:14 +0000 (-0300)
Subject: testsuite: arm: bf16_vstn_1 vst3q_bf16 improved by late-combine
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b4f09e9f8fd7e9fa8e132a03b510a3aaca78260f;p=thirdparty%2Fgcc.git

testsuite: arm: bf16_vstn_1 vst3q_bf16 improved by late-combine

The late-combine pass removes some unnecessary register copying in
bf16_vstn_1.c, copying that was expected by vst3q_bf16.  Adjust the
expectations so that they match the better code we get now.


for  gcc/testsuite/ChangeLog

	* gcc.target/arm/simd/bf16_vstn_1.c: Adjust expectations for
	code improved by late-combine.
---

diff --git a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
index 5c6cdd5e43e..ac90a53218a 100644
--- a/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/bf16_vstn_1.c
@@ -46,7 +46,7 @@ test_vst3_bf16 (bfloat16_t *ptr, bfloat16x4x3_t val)
 /*
 **test_vst3q_bf16:
 **      ...
-**	vst3.16	{d17, d19, d21}, \[r0\]
+**	vst3.16	{d1, d3, d5}, \[r0\]
 **	bx	lr
 */
 void