From: Andy Shevchenko Date: Wed, 5 Feb 2025 09:51:19 +0000 (+0200) Subject: pinctrl: cy8c95x0: Separate EEPROM related register definitios X-Git-Tag: v6.15-rc1~106^2~54 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b5bad465ac109a810d202156d82d76cc22bd8dd1;p=thirdparty%2Fkernel%2Flinux.git pinctrl: cy8c95x0: Separate EEPROM related register definitios Currently it's not easy to see at a glance the group of the registers that are per port. Add a blank line and a comment to make it better. Also add a missing definition for one of the EEPROM related registers. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/20250205095243.512292-10-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij --- diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 4b683401cae11..6a2c7343bf55e 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -40,6 +40,7 @@ /* Port Select configures the port */ #define CY8C95X0_PORTSEL 0x18 + /* Port settings, write PORTSEL first */ #define CY8C95X0_INTMASK 0x19 #define CY8C95X0_SELPWM 0x1A @@ -53,6 +54,9 @@ #define CY8C95X0_DRV_PP_FAST 0x21 #define CY8C95X0_DRV_PP_SLOW 0x22 #define CY8C95X0_DRV_HIZ 0x23 + +/* Internal device configuration */ +#define CY8C95X0_ENABLE_WDE 0x2D #define CY8C95X0_DEVID 0x2E #define CY8C95X0_WATCHDOG 0x2F #define CY8C95X0_COMMAND 0x30