From: Akshay Gupta Date: Wed, 18 Mar 2026 11:27:09 +0000 (+0530) Subject: misc: amd-sbi: Add revision support for AMD Venice platform X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b5e7fb39819aec09a27c89f203774ffc6b13a78d;p=thirdparty%2Fkernel%2Flinux.git misc: amd-sbi: Add revision support for AMD Venice platform The AMD Venice platform uses revision 0x31 and a two-byte register address size. Add the revision to the CPUID and MCAMSR protocol functions to ensure correct protocol identification. Reviewed-by: Naveen Krishna Chatradhi Signed-off-by: Akshay Gupta Link: https://patch.msgid.link/20260318112711.2757467-1-Akshay.Gupta@amd.com Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c index 6979bfd7da64..d4238ebad3c6 100644 --- a/drivers/misc/amd-sbi/rmi-core.c +++ b/drivers/misc/amd-sbi/rmi-core.c @@ -214,6 +214,7 @@ static int rmi_cpuid_read(struct sbrmi_data *data, goto exit_unlock; break; case 0x21: + case 0x31: ret = rmi_cpuid_input_ext(data, msg, thread); if (ret) goto exit_unlock; @@ -327,6 +328,7 @@ static int rmi_mca_msr_read(struct sbrmi_data *data, goto exit_unlock; break; case 0x21: + case 0x31: ret = rmi_mcamsr_input_ext(data, msg, thread); if (ret) goto exit_unlock;