From: Adolf Belka Date: Wed, 13 May 2026 19:37:08 +0000 (+0200) Subject: intel-microcode: Update to version 20260512 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b6c1b03bef6400a8732291fb9cf040955efa193f;p=ipfire-2.x.git intel-microcode: Update to version 20260512 - Update from version 20260227 to 20260512 - Update of rootfile - Changelog 20260512 Purpose Security updates for INTEL-SA-01420 Update for functional issues. Refer to 4th Gen Intel® Xeon® Scalable Processors Specification Update for details. Update for functional issues. Refer to 5th Gen Intel® Xeon® Scalable Processors Specification Update for details. Update for functional issues. Refer to Intel® Core™ Ultra 200 V Series Processor for details. Update for functional issues. Refer to Intel® Core™ Ultra Processors (Series 2) for details. Update for functional issues. Refer to Intel® Core™ Ultra Processors (Series 3) for details. Update for functional issues. Refer to Intel® Xeon® 6700 Series Processors with E-cores for details. Update for functional issues. Refer to Intel® Xeon® 6900/6700/6500 Series Processors with P-cores for details. Update for functional issues. Refer to Intel® Xeon® 6700P-B/6500P-B-Series SoC with P-Cores for details. New Platforms Processor Stepping F-M-S/PI Old Ver New Ver Products PTL 404 A1 06-cc-03/90 0000011b Intel Core Ultra Processor (Series 3) PTL-H 484/12Xe A0/B0 06-cc-02/90 0000011b Intel Core Ultra Processor (Series 3) Updated Platforms Processor Stepping F-M-S/PI Old Ver New Ver Products ARL-H A1 06-c5-02/82 0000011b 00000121 Core Ultra Processor (Series 2) ARL-S/HX (8P) B0 06-c6-02/82 0000011b 00000121 Core Ultra Processor (Series 2) EMR-SP A1 06-cf-02/87 210002d3 210002e0 Xeon Scalable Gen5 GNR-AP/SP Bx/Hx/Lx 06-ad-01/95 01000405 01000423 Xeon 6900/6700/6500 Series Processors with P-Cores GNR-D B0/B1 06-ae-01/97 01000303 01000307 Xeon 6700P-B/6500P-B Series SoC with P-Cores GNR-SP R1S Bx/Hx/Lx 06-ad-01/20 0a000133 0a000142 Xeon 6700/6500-Series Processors with P-Cores LNL B0 06-bd-01/80 00000125 00000126 Core Ultra 200 V Series Processor SPR-SP E4/S2 06-8f-07/87 2b000661 2b000670 Xeon Scalable Gen4 SPR-SP E5/S3 06-8f-08/87 2b000661 2b000670 Xeon Scalable Gen4 SRF-AP/SP C0 06-af-03/01 03000382 030003a3 Xeon 6900/6700-Series Processors with E-Cores Signed-off-by: Adolf Belka Signed-off-by: Michael Tremer --- diff --git a/config/rootfiles/common/x86_64/intel-microcode b/config/rootfiles/common/x86_64/intel-microcode index fc212fe83..dd777dbf4 100644 --- a/config/rootfiles/common/x86_64/intel-microcode +++ b/config/rootfiles/common/x86_64/intel-microcode @@ -127,6 +127,8 @@ lib/firmware/intel-ucode/06-bf-02 lib/firmware/intel-ucode/06-bf-05 lib/firmware/intel-ucode/06-c5-02 lib/firmware/intel-ucode/06-c6-02 +lib/firmware/intel-ucode/06-cc-02 +lib/firmware/intel-ucode/06-cc-03 lib/firmware/intel-ucode/06-cf-02 lib/firmware/intel-ucode/0f-00-07 lib/firmware/intel-ucode/0f-00-0a diff --git a/lfs/intel-microcode b/lfs/intel-microcode index f7e992bca..12ace1d01 100644 --- a/lfs/intel-microcode +++ b/lfs/intel-microcode @@ -24,7 +24,7 @@ include Config -VER = 20260227 +VER = 20260512 THISAPP = Intel-Linux-Processor-Microcode-Data-Files-microcode-$(VER) DL_FILE = $(THISAPP).tar.gz @@ -41,7 +41,7 @@ objects = $(DL_FILE) $(DL_FILE) = $(DL_FROM)/$(DL_FILE) -$(DL_FILE)_BLAKE2 = 3725dee3af32b545a754a47616c7451a6e7e227af125a8eb35729b2784dfbdecccea6054e1f3190119253041697ce525380e5a98c929e42a4294028d2eca1ebd +$(DL_FILE)_BLAKE2 = 10407aa08481998fb5102bbf517b1cf5c083d16fae8468d25ad2c6ad4b6a665c520cb35f22a44b1f2b385232694bd18b1ee2e75a46658dcdafe40c0c54562c07 install : $(TARGET)