From: Zephyr Li Date: Thu, 11 Jun 2026 12:58:34 +0000 (+0800) Subject: lscpu: show RISC-V MMU mode X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b746c53978bb19b142807b174bc0381fc257c7d4;p=thirdparty%2Futil-linux.git lscpu: show RISC-V MMU mode Signed-off-by: Zephyr Li --- diff --git a/sys-utils/lscpu-cputype.c b/sys-utils/lscpu-cputype.c index a56ace76c..9b43f0e3f 100644 --- a/sys-utils/lscpu-cputype.c +++ b/sys-utils/lscpu-cputype.c @@ -105,6 +105,7 @@ void lscpu_unref_cputype(struct lscpu_cputype *ct) free(ct->static_mhz); free(ct->dynamic_mhz); free(ct->isa); + free(ct->mmu); free(ct); } } @@ -202,6 +203,7 @@ enum { PAT_VENDOR, PAT_CACHE, PAT_ISA, + PAT_MMU, }; /* @@ -243,6 +245,7 @@ static const struct cpuinfo_pattern type_patterns[] = DEF_PAT_CPUTYPE( "max thread id", PAT_MAX_THREAD_ID, mtid), /* s390 */ DEF_PAT_CPUTYPE( "microcode", PAT_MICROCODE, microcode), DEF_PAT_CPUTYPE( "mimpid", PAT_MODEL, model), /* riscv */ + DEF_PAT_CPUTYPE( "mmu", PAT_MMU, mmu), /* riscv */ DEF_PAT_CPUTYPE( "model", PAT_MODEL, model), DEF_PAT_CPUTYPE( "model name", PAT_MODEL_NAME, modelname), DEF_PAT_CPUTYPE( "mvendorid", PAT_VENDOR, vendor), /* riscv */ diff --git a/sys-utils/lscpu.c b/sys-utils/lscpu.c index 0c8bdf63b..66ad03f4b 100644 --- a/sys-utils/lscpu.c +++ b/sys-utils/lscpu.c @@ -973,6 +973,10 @@ print_summary_cputype(struct lscpu_cxt *cxt, lscpu_format_isa_riscv(ct); add_summary_s(tb, sec, _("ISA:"), ct->isa); } + + if (ct->mmu && is_riscv(ct)) { + add_summary_s(tb, sec, _("MMU:"), ct->mmu); + } } /* diff --git a/sys-utils/lscpu.h b/sys-utils/lscpu.h index b01f081e8..476312d18 100644 --- a/sys-utils/lscpu.h +++ b/sys-utils/lscpu.h @@ -115,7 +115,8 @@ struct lscpu_cputype { size_t nr_socket_on_cluster; /* the number of sockets if the is_cluster is 1 */ - char *isa; /* loongarch */ + char *isa; /* loongarch, riscv */ + char *mmu; /* riscv */ }; /* dispatching modes */