From: Carl Love Date: Tue, 6 Oct 2020 17:06:56 +0000 (-0500) Subject: VSX Load/Store rightmost element operation tests X-Git-Tag: VALGRIND_3_17_0~115 X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b900ce172ef81fde9c875c70991485be6ea90e75;p=thirdparty%2Fvalgrind.git VSX Load/Store rightmost element operation tests --- diff --git a/NEWS b/NEWS index 7b4cea04a0..f1ced278c4 100644 --- a/NEWS +++ b/NEWS @@ -56,6 +56,7 @@ n-i-bz helgrind: If hg_cli__realloc fails, return NULL. 428035 drd: Unbreak the musl build 428648 s390_emit_load_mem panics due to 20-bit offset for vector load 427400 PPC ISA 3.1 support is missing, part 4 +427401 PPC ISA 3.1 support is missing, part 5 Release 3.16.1 (?? June 2020) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/none/tests/ppc64/test_isa_3_1_XT.c b/none/tests/ppc64/test_isa_3_1_XT.c index 838a75ab12..c16ddedac3 100644 --- a/none/tests/ppc64/test_isa_3_1_XT.c +++ b/none/tests/ppc64/test_isa_3_1_XT.c @@ -297,6 +297,38 @@ static void test_xxeval_imm3 (void) { __asm__ __volatile__ ("xxeval %x0, %x1, %x2, %x3, 3" : "=wa" (vec_xt) : "wa" (vec_xa), "wa" (vec_xb), "wa" (vec_xc) ); } +static void test_lxvrbx (void) { + __asm__ __volatile__ ("lxvrbx %x0, %1, %2" + : "=wa" (vec_xt) : "r" (ra), "r" (rb) ); +} +static void test_lxvrhx (void) { + __asm__ __volatile__ ("lxvrhx %x0, %1, %2" + : "=wa" (vec_xt) : "r" (ra), "r" (rb) ); +} +static void test_lxvrwx (void) { + __asm__ __volatile__ ("lxvrwx %x0, %1, %2" + : "=wa" (vec_xt) : "r" (ra), "r" (rb) ); +} +static void test_lxvrdx (void) { + __asm__ __volatile__ ("lxvrdx %x0, %1, %2" + : "=wa" (vec_xt) : "r" (ra), "r" (rb) ); +} +static void test_stxvrbx (void) { + __asm__ __volatile__ ("stxvrbx %x0, %1, %2" + :: "wa" (vec_xs), "r" (ra), "r" (rb) ); +} +static void test_stxvrhx (void) { + __asm__ __volatile__ ("stxvrhx %x0, %1, %2" + :: "wa" (vec_xs), "r" (ra), "r" (rb) ); +} +static void test_stxvrwx (void) { + __asm__ __volatile__ ("stxvrwx %x0, %1, %2" + :: "wa" (vec_xs), "r" (ra), "r" (rb) ); +} +static void test_stxvrdx (void) { + __asm__ __volatile__ ("stxvrdx %x0, %1, %2" + :: "wa" (vec_xs), "r" (ra), "r" (rb) ); +} static void test_plfd_64 (void) { __asm__ __volatile__ ("plfd 28, 64(%0), 0" :: "r" (ra) ); } @@ -483,6 +515,10 @@ static test_list_t testgroup_generic[] = { { &test_lxvp_0, "lxvp 0", "XTp,DQ(RA)"}, /* bcwp */ { &test_lxvp_16, "lxvp 16", "XTp,DQ(RA)"}, /* bcwp */ { &test_lxvp_32, "lxvp 32", "XTp,DQ(RA)"}, /* bcwp */ + { &test_lxvrbx, "lxvrbx", "XT,RA,RB"}, /* bcs */ + { &test_lxvrdx, "lxvrdx", "XT,RA,RB"}, /* bcs */ + { &test_lxvrhx, "lxvrhx", "XT,RA,RB"}, /* bcs */ + { &test_lxvrwx, "lxvrwx", "XT,RA,RB"}, /* bcs */ { &test_plfd_0, "plfd 0", "FRT,D(RA),R"}, /* bcwp */ { &test_plfd_4, "plfd 4", "FRT,D(RA),R"}, /* bcwp */ { &test_plfd_8, "plfd 8", "FRT,D(RA),R"}, /* bcwp */ @@ -546,6 +582,10 @@ static test_list_t testgroup_generic[] = { { &test_stxvp_off16, "stxvp off16", "XSp,DQ(RA)"}, /* bcwp */ { &test_stxvp_off32, "stxvp off32", "XSp,DQ(RA)"}, /* bcwp */ { &test_stxvp_off48, "stxvp off48", "XSp,DQ(RA)"}, /* bcwp */ + { &test_stxvrbx, "stxvrbx", "XS,RA,RB"}, /* bcs */ + { &test_stxvrdx, "stxvrdx", "XS,RA,RB"}, /* bcs */ + { &test_stxvrhx, "stxvrhx", "XS,RA,RB"}, /* bcs */ + { &test_stxvrwx, "stxvrwx", "XS,RA,RB"}, /* bcs */ { &test_xxblendvb, "xxblendvb", "XT,XA,XB,XC"}, /* bcs */ { &test_xxblendvd, "xxblendvd", "XT,XA,XB,XC"}, /* bcs */ { &test_xxblendvh, "xxblendvh", "XT,XA,XB,XC"}, /* bcs */ diff --git a/none/tests/ppc64/test_isa_3_1_XT.stdout.exp b/none/tests/ppc64/test_isa_3_1_XT.stdout.exp index 365fc134eb..efa95884e9 100644 --- a/none/tests/ppc64/test_isa_3_1_XT.stdout.exp +++ b/none/tests/ppc64/test_isa_3_1_XT.stdout.exp @@ -47,6 +47,34 @@ lxvp 16 (&buffer) => 5a05a05a05a07a05 0102030405067708 7ff0000000007000 7f000000 lxvp 32 (&buffer) => fedcba9876547210 0123456789ab7def 5a05a05a05a07a05 0102030405067708 +lxvrbx 0 (&buffer) => 59 0 +lxvrbx 8 (&buffer) => 7 0 +lxvrbx 10 (&buffer) => 0 0 +lxvrbx 18 (&buffer) => 0 0 +lxvrbx 20 (&buffer) => 5 0 +lxvrbx 28 (&buffer) => 8 0 + +lxvrdx 0 (&buffer) => 3fe00094e0007359 0 +lxvrdx 8 (&buffer) => 7ff7020304057607 0 +lxvrdx 10 (&buffer) => 7ff0000000007000 0 +lxvrdx 18 (&buffer) => 7f0000007f007000 0 +lxvrdx 20 (&buffer) => 5a05a05a05a07a05 0 +lxvrdx 28 (&buffer) => 102030405067708 0 + +lxvrhx 0 (&buffer) => 7359 0 +lxvrhx 8 (&buffer) => 7607 0 +lxvrhx 10 (&buffer) => 7000 0 +lxvrhx 18 (&buffer) => 7000 0 +lxvrhx 20 (&buffer) => 7a05 0 +lxvrhx 28 (&buffer) => 7708 0 + +lxvrwx 0 (&buffer) => e0007359 0 +lxvrwx 8 (&buffer) => 4057607 0 +lxvrwx 10 (&buffer) => 7000 0 +lxvrwx 18 (&buffer) => 7f007000 0 +lxvrwx 20 (&buffer) => 5a07a05 0 +lxvrwx 28 (&buffer) => 5067708 0 + plfd 0 (&buffer) => 5.000710e-01 plfd 4 (&buffer) => 2.752739e-289 @@ -188,6 +216,34 @@ stxvp off32 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff80000 stxvp off48 (&buffer) 0180055e0180077e 0080000e8080000e ff7ffffe7f7ffffe ff8000007f800000 => [ - - - - - - ff7ffffe7f7ffffe ff8000007f800000] +stxvrbx 0 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [3fe00094e00073fe - - - - - - - ] +stxvrbx 8 (&buffer) 0080000e8080000e,ff7ffffe7f7ffffe => [ - 7ff702030405760e - - - - - - ] +stxvrbx 10 (&buffer) 0180055e0180077e,0080000e8080000e => [ - - 7ff000000000707e - - - - - ] +stxvrbx 18 (&buffer) 0000111e8000222e,0180055e0180077e => [ - - - 7f0000007f00702e - - - - ] +stxvrbx 20 (&buffer) 7ff0000000000000,0000111e8000222e => [ - - - - 5a05a05a05a07a00 - - - ] +stxvrbx 28 (&buffer) fff0000000000000,7ff0000000000000 => [ - - - - - 0102030405067700 - - ] + +stxvrdx 0 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [ff7ffffe7f7ffffe - - - - - - - ] +stxvrdx 8 (&buffer) 0080000e8080000e,ff7ffffe7f7ffffe => [ - 0080000e8080000e - - - - - - ] +stxvrdx 10 (&buffer) 0180055e0180077e,0080000e8080000e => [ - - 0180055e0180077e - - - - - ] +stxvrdx 18 (&buffer) 0000111e8000222e,0180055e0180077e => [ - - - 0000111e8000222e - - - - ] +stxvrdx 20 (&buffer) 7ff0000000000000,0000111e8000222e => [ - - - - 7ff0000000000000 - - - ] +stxvrdx 28 (&buffer) fff0000000000000,7ff0000000000000 => [ - - - - - fff0000000000000 - - ] + +stxvrhx 0 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [3fe00094e000fffe - - - - - - - ] +stxvrhx 8 (&buffer) 0080000e8080000e,ff7ffffe7f7ffffe => [ - 7ff702030405000e - - - - - - ] +stxvrhx 10 (&buffer) 0180055e0180077e,0080000e8080000e => [ - - 7ff000000000077e - - - - - ] +stxvrhx 18 (&buffer) 0000111e8000222e,0180055e0180077e => [ - - - 7f0000007f00222e - - - - ] +stxvrhx 20 (&buffer) 7ff0000000000000,0000111e8000222e => [ - - - - 5a05a05a05a00000 - - - ] +stxvrhx 28 (&buffer) fff0000000000000,7ff0000000000000 => [ - - - - - 0102030405060000 - - ] + +stxvrwx 0 (&buffer) ff7ffffe7f7ffffe,ff8000007f800000 => [3fe000947f7ffffe - - - - - - - ] +stxvrwx 8 (&buffer) 0080000e8080000e,ff7ffffe7f7ffffe => [ - 7ff702038080000e - - - - - - ] +stxvrwx 10 (&buffer) 0180055e0180077e,0080000e8080000e => [ - - 7ff000000180077e - - - - - ] +stxvrwx 18 (&buffer) 0000111e8000222e,0180055e0180077e => [ - - - 7f0000008000222e - - - - ] +stxvrwx 20 (&buffer) 7ff0000000000000,0000111e8000222e => [ - - - - 5a05a05a00000000 - - - ] +stxvrwx 28 (&buffer) fff0000000000000,7ff0000000000000 => [ - - - - - 0102030400000000 - - ] + xxblendvb 7f800000ff800000,ff8000007f800000 0000000000000000,00000000ffffffff 7f800000ff800000,ff8000007f800000 => 7f800000ff800000 ff8000007f800000 xxblendvb 7f800000ff800000,ff8000007f800000 ffffffff55555555,5555aaaaaaaa5555 7f800000ff800000,ff8000007f800000 => 7f800000ff800000 ff8000007f800000 xxblendvb 7f800000ff800000,ff8000007f800000 aaaa00000000aaaa,0000000000000000 7f800000ff800000,ff8000007f800000 => 7f800000ff800000 ff8000007f800000 @@ -7038,4 +7094,4 @@ xxspltiw imm3 => 300000003 300000003 xxspltiw imm8 => 800000008 800000008 -All done. Tested 134 different instruction groups +All done. Tested 142 different instruction groups