From: Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Date: Fri, 21 Feb 2014 21:01:01 +0000 (+0000)
Subject: altivec.md (altivec_vsumsws): Replace second vspltw with vsldoi.
X-Git-Tag: releases/gcc-4.9.0~765
X-Git-Url: http://git.ipfire.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=b90ab1ba8c2a21d41ed984729e42891ebf96b505;p=thirdparty%2Fgcc.git

altivec.md (altivec_vsumsws): Replace second vspltw with vsldoi.

gcc:

2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* config/rs6000/altivec.md (altivec_vsumsws): Replace second
	vspltw with vsldoi.
	(reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of
	gen_altivec_vsumsws.

gcc/testsuite:

2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.dg/vmx/vsums.c: Check entire result vector.
	* gcc.dg/vmx/vsums-be-order.c: Likewise.

From-SVN: r208021
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a7797a1b3b1b..9b1638dc8a2a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* config/rs6000/altivec.md (altivec_vsumsws): Replace second
+	vspltw with vsldoi.
+	(reduc_uplus_v16qi): Use gen_altivec_vsumsws_direct instead of
+	gen_altivec_vsumsws.
+
 2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
 	* config/rs6000/altivec.md (altivec_lvxl): Rename as
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index 115354a2d50a..5b5541987967 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -1651,7 +1651,7 @@
   if (VECTOR_ELT_ORDER_BIG)
     return "vsumsws %0,%1,%2";
   else
-    return "vspltw %3,%2,0\n\tvsumsws %3,%1,%3\n\tvspltw %0,%3,3";
+    return "vspltw %3,%2,0\n\tvsumsws %3,%1,%3\n\tvsldoi %0,%3,%3,12";
 }
   [(set_attr "type" "veccomplex")
    (set (attr "length")
@@ -2539,7 +2539,7 @@
 
   emit_insn (gen_altivec_vspltisw (vzero, const0_rtx));
   emit_insn (gen_altivec_vsum4ubs (vtmp1, operands[1], vzero));
-  emit_insn (gen_altivec_vsumsws (dest, vtmp1, vzero));
+  emit_insn (gen_altivec_vsumsws_direct (dest, vtmp1, vzero));
   DONE;
 })
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f051017c1481..8f8f35b9184b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+	* gcc.dg/vmx/vsums.c: Check entire result vector.
+	* gcc.dg/vmx/vsums-be-order.c: Likewise.
+
 2014-02-21  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
 
 	* gcc.dg/vmx/ld.c: New test.
diff --git a/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c b/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c
index 69fe3b64aafb..e4a34e9f9660 100644
--- a/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c
+++ b/gcc/testsuite/gcc.dg/vmx/vsums-be-order.c
@@ -8,12 +8,13 @@ static void test()
 
 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
   vector signed int vb = {128,0,0,0};
+  vector signed int evd = {136,0,0,0};
 #else
   vector signed int vb = {0,0,0,128};
+  vector signed int evd = {0,0,0,136};
 #endif
 
   vector signed int vd = vec_sums (va, vb);
-  signed int r = vec_extract (vd, 3);
 
-  check (r == 136, "sums");
+  check (vec_all_eq (vd, evd), "sums");
 }
diff --git a/gcc/testsuite/gcc.dg/vmx/vsums.c b/gcc/testsuite/gcc.dg/vmx/vsums.c
index dfbb1cc6ddcd..d678aceec10a 100644
--- a/gcc/testsuite/gcc.dg/vmx/vsums.c
+++ b/gcc/testsuite/gcc.dg/vmx/vsums.c
@@ -4,9 +4,9 @@ static void test()
 {
   vector signed int va = {-7,11,-13,17};
   vector signed int vb = {0,0,0,128};
+  vector signed int evd = {0,0,0,136};
 
   vector signed int vd = vec_sums (va, vb);
-  signed int r = vec_extract (vd, 3);
 
-  check (r == 136, "sums");
+  check (vec_all_eq (vd, evd), "sums");
 }